On-chip measurements of standard-cell propagation delay

Churayev, Sergey; Matkarimov, Bakhyt; Paltashev, Timour

doi:10.1109/ewdts.2010.5742113

Cited by 4 publications

(1 citation statement)

References 3 publications

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“…Due to the continuous advances in very large scale integration circuit technology and the corresponding growth in system complexity, digital designers often rely on a semi-custom design flow, exploiting standard-cell libraries [1][2]. By means of a standard-cell design flow, silicon area can be effectively exploited while keeping costs and development time under control [3][4]. The application-specific integrated circuit (ASIC) design approach depends highly on library quality to meet the design specifications [5].…”

Section: Introductionmentioning

confidence: 99%

A Novel Technique for Arithmetic Elements Standard Cell Library Establishment Based on Tanner Tools

Zhao

2012

AMR

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The economic and efficient accomplishment of an application-specific integrated circuit design depends heavily upon the choice of the library. Therefore, it is important to build library that full fills the design requirement. Tanner Tools is a set of software for designing integrated circuits. The great advantage of Tanner is that it can provide a complete circuit design tools in desktop computers. The paper aims to create a standard cell library establishment on the 0.5 micro complementary metal–oxide–semiconductor mixed signal process based on the Tanner Tools.

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