2017 International Conference on Innovations in Electronics, Signal Processing and Communication (IESC) 2017
DOI: 10.1109/iespc.2017.8071868
|View full text |Cite
|
Sign up to set email alerts
|

On-chip antennas using standard CMOS technology: A brief overview

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1

Citation Types

0
4
0

Year Published

2019
2019
2022
2022

Publication Types

Select...
5
1

Relationship

1
5

Authors

Journals

citations
Cited by 10 publications
(4 citation statements)
references
References 18 publications
0
4
0
Order By: Relevance
“…Importantly, the coupling coefficients under consideration, on the order of ≈ 0.01, are expected to be unproblematic to realize over considerably longer distances, on the order of meters and beyond, using optimized electromagnetic structures. It should be noted that even this though initial laboratory demonstration was based on simple inductive coupling, without any attempt at design optimization, the mechanisms are expected to straightforwardly generalize to diverse antenna types, as well as to frequencies well-suited for on-chip coil realization [36], [64], [67].…”
Section: B Noveltymentioning
confidence: 99%
“…Importantly, the coupling coefficients under consideration, on the order of ≈ 0.01, are expected to be unproblematic to realize over considerably longer distances, on the order of meters and beyond, using optimized electromagnetic structures. It should be noted that even this though initial laboratory demonstration was based on simple inductive coupling, without any attempt at design optimization, the mechanisms are expected to straightforwardly generalize to diverse antenna types, as well as to frequencies well-suited for on-chip coil realization [36], [64], [67].…”
Section: B Noveltymentioning
confidence: 99%
“…Consequently, the 3D ratio (7) for the silicon example is 1/40.0 which means 97.5% (2.5%) of the radiated power is emitted into the dielectric (air). Clearly, the large fields pointed away from the free-space region significantly impacts the performance characteristics of any antenna placed on the interface [1], [2], [4], [6], [7].…”
Section: A Electric Current Sheet On An Air-dielectric Interfacementioning
confidence: 99%
“…Around six to nine metal layers are available in the SiO 2 with interconnected-vias in a typical CMOS stack-up. The high relative permittivity of Si (ε r =11.9) attracts most of the antenna fields towards the substrate instead of being radiated in the air [8,9]. Further, the low resistivity (~10 Ω-cm) of Si causes the loss of power in the Si substrate as heat.…”
Section: Introductionmentioning
confidence: 99%