Observation of hopping transitions for delocalized electrons by temperature-dependent conductance in silicon junctionless nanowire transistors*

Guo, Yang-Yan; Han, Wei; Zhao, Xiao-Song; Dou, Ya-Mei; Zhang, Xiaodi; Wu, Xinyu; Yang, Fuhua

doi:10.1088/1674-1056/ab3e68

Cited by 2 publications

(1 citation statement)

References 34 publications

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“…where is the electron charge, is the relative permittivity and is the localization length in a regime of ES-VRH. The transition of electron hopping behaviours in the JNT, which can be well explained by Mott and Efros-Shklovskii (ES) formalism, has been studied in our previous work [19,20] . In this work, we investigate gate-regulated transition temperatures of electron hopping behaviours through discrete dopant atoms.…”

Section: Introductionmentioning

confidence: 99%

Gate-regulated transition temperatures for electron hopping behaviours in silicon junctionless nanowire transistors

Wu¹,

Han²,

Zhao³

et al. 2020

J. Semicond.

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We investigate gate-regulated transition temperatures for electron hopping behaviours through discrete ionized dopant atoms in silicon junctionless nanowire transistors. We demonstrate that the localization length of the wave function in the spatial distribution is able to be manipulated by the gate electric field. The transition temperatures regulated as the function of the localization length and the density of states near the Fermi energy level allow us to understand the electron hopping behaviours under the influence of thermal activation energy and Coulomb interaction energy. This is useful for future quantum information processing by single dopant atoms in silicon.

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Section: Introductionmentioning

confidence: 99%

Gate-regulated transition temperatures for electron hopping behaviours in silicon junctionless nanowire transistors

Wu¹,

Han²,

Zhao³

et al. 2020

J. Semicond.

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Recent research progress of ferroelectric negative capacitance field effect transistors

Chen¹,

Han²,

Yang³

et al. 2020

Acta Phys. Sin.

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Ferroelectric negative capacitance field effect transistors(Fe-NCFETs) can break through the so-called “Boltzmann Tyranny” of traditional metal oxide semiconductor field effect transistors and reduce the subthreshold swing below 60 mV/dec, which could greatly improve the on/off current ratio and short-channel effect. Consequently, the power dissipation of the device is effectively lowered. The Fe-NCFET provides a choice for the downscaling of the transistor and the continuation of Moore’s Law. In this review, the representative research progress of Fe-NCFETs in recent years is comprehensively reviewed to conduce to further study. In the first chapter, the background and significance of Fe-NCFETs are introduced. In the second chapter, the basic properties of ferroelectric materials are introduced, and then the types of ferroelectric materials are summarized. Among them, the invention of hafnium oxide-based ferroelectric materials solves the problem of compatibility between traditional ferroelectric materials and CMOS processes, making the performance of NCFETs further improved. In the third chapter, the advantages and disadvantages of Fe-NCFETs with MFS, MFIS and MFMIS structures are first summarized, then from the perspective of atomic microscopic forces the “S” relationship curve of ferroelectric materials is derived and combined with Gibbs free energy formula and L-K equation, and the intrinsic negative capacitance region in the free energy curve of the ferroelectric material is obtained. Next, the steady-state negative capacitance and transient negative capacitance in the ferroelectric capacitor are discussed from the aspects of concept and circuit characteristics; after that the working area of negative capacitance Fe-NCFET is discussed. In the fourth chapter, the significant research results of Fe-NCFETs combined with hafnium-based ferroelectrics in recent years are summarized from the perspective of two-dimensional channel materials and three-dimensional channel materials respectively. Among them, the Fe-NCFETs based on three-dimensional channel materials such as silicon, germanium-based materials, III-V compounds, and carbon nanotubes are more compatible with traditional CMOS processes. The interface between the channel and the ferroelectric layer is better, and the electrical performance is more stable. However, thereremain some problems to be solved in three-dimensional channel materials such as the limited on-state current resulting from the low effective carrier mobility of the silicon, the small on/off current ratio due to the leakage caused by the small bandgap of the germanium-based material, the poor interfacial properties between the III-V compound materials and the dielectric layer, and the ambiguous working mechanism of Fe-NCFETs based on carbon nanotube. Compared with Fe-NCFETs based on three-dimensional channel materials, the Fe-NCFETs based on two-dimensional channel materials such as transition metal chalcogenide, graphene, and black phosphorus provide the possibility for the characteristic size of the transistor to be reduced to 3 nm. However, the interface performance between the two-dimensional channel material and the gate dielectric layer is poor, since there are numerous defect states at the interface. Furthermore, the two-dimensional channel materials have poor compatibility with traditional CMOS process. Hence, it is imperative to search for new approaches to finding a balance between device characteristics. Finally, the presently existing problems and future development directions of Fe-NCFETs are summarized and prospected.

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Observation of hopping transitions for delocalized electrons by temperature-dependent conductance in silicon junctionless nanowire transistors*

Cited by 2 publications

References 34 publications

Gate-regulated transition temperatures for electron hopping behaviours in silicon junctionless nanowire transistors

Gate-regulated transition temperatures for electron hopping behaviours in silicon junctionless nanowire transistors

Recent research progress of ferroelectric negative capacitance field effect transistors

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