NXgraph: An efficient graph processing system on a single machine

Chi, Yuze; Dai, Guohao; Wang, Yu; Sun, Guangyu; Li, Guoliang; Yang, Huazhong

doi:10.1109/icde.2016.7498258

Cited by 71 publications

(33 citation statements)

References 22 publications

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“…We borrow the abstraction of vertex interval and edge shard from [9,27] to partition graph data, which is the basis of our data-aware sparsity elimination in the next subsection. We do not need explicit preprocessing to generate the intervals and shards since we directly take the data format of compressed sparse column (CSC) as input.…”

Section: Graph Partitioning (Static)mentioning

confidence: 99%

HyGCN: A GCN Accelerator with Hybrid Architecture

Yan

Deng

et al. 2020

2020 IEEE International Symposium on High Performance Computer Architecture (HPCA)

241

205

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Inspired by the great success of neural networks, graph convolutional neural networks (GCNs) are proposed to analyze graph data. GCNs mainly include two phases with distinct execution patterns. The Aggregation phase, behaves as graph processing, showing a dynamic and irregular execution pattern. The Combination phase, acts more like the neural networks, presenting a static and regular execution pattern. The hybrid execution patterns of GCNs require a design that alleviates irregularity and exploits regularity. Moreover, to achieve higher performance and energy efficiency, the design needs to leverage the high intra-vertex parallelism in Aggregation phase, the highly reusable inter-vertex data in Combination phase, and the opportunity to fuse phase-by-phase execution introduced by the new features of GCNs. However, existing architectures fail to address these demands.In this work, we first characterize the hybrid execution patterns of GCNs on Intel Xeon CPU. Guided by the characterization, we design a GCN accelerator, HyGCN, using a hybrid architecture to efficiently perform GCNs. Specifically, first, we build a new programming model to exploit the fine-grained parallelism for our hardware design. Second, we propose a hardware design with two efficient processing engines to alleviate the irregularity of Aggregation phase and leverage the regularity of Combination phase. Besides, these engines can exploit various parallelism and reuse highly reusable data efficiently. Third, we optimize the overall system via inter-engine pipeline for inter-phase fusion and priority-based off-chip memory access coordination to improve off-chip bandwidth utilization. Compared to the state-of-the-art software framework running on Intel Xeon CPU and NVIDIA V100 GPU, our work achieves on average 1509× speedup with 2500× energy reduction and average 6.5× speedup with 10× energy reduction, respectively. * Corresponding author is Xiaochun Ye and his email is yexi-aochun@ict.ac.cn.

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Section: Graph Partitioning (Static)mentioning

confidence: 99%

HyGCN: A GCN Accelerator with Hybrid Architecture

Yan

Deng

et al. 2020

2020 IEEE International Symposium on High Performance Computer Architecture (HPCA)

241

205

View full text Add to dashboard Cite

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“…Second, the computing performance for several high‐complexity metrics, such as Lp and BC, is not satisfactory for large networks. To further improve the software platform, we intend to introduce state‐of‐the‐art graph computing libraries, for example, NXgraph (Chi et al, ), a disk‐based single‐machine system, and CuSha (Khorasani, Vora, Gupta, & Bhuyan, ), a GPU‐based graph computing framework. Furthermore, we will extend the toolbox to a cluster with multiple CPUs and GPUs to exploit the intersubject parallelism for Big Data research using large datasets.…”

Section: Discussionmentioning

confidence: 99%

PAGANI Toolkit: Parallel graph‐theoretical analysis package for brain network big data

Xia

Zhao

et al. 2018

Human Brain Mapping

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The recent collection of unprecedented quantities of neuroimaging data with high spatial resolution has led to brain network big data. However, a toolkit for fast and scalable computational solutions is still lacking. Here, we developed the PArallel Graph-theoretical ANalysIs (PAGANI) Toolkit based on a hybrid central processing unit-graphics processing unit (CPU-GPU) framework with a graphical user interface to facilitate the mapping and characterization of high-resolution brain networks. Specifically, the toolkit provides flexible parameters for users to customize computations of graph metrics in brain network analyses. As an empirical example, the PAGANI Toolkit was applied to individual voxel-based brain networks with ∼200,000 nodes that were derived from a resting-state fMRI dataset of 624 healthy young adults from the Human Connectome Project. Using a personal computer, this toolbox completed all computations in ∼27 h for one subject, which is markedly less than the 118 h required with a single-thread implementation. The voxel-based functional brain networks exhibited prominent small-world characteristics and densely connected hubs, which were mainly located in the medial and lateral fronto-parietal cortices. Moreover, the female group had significantly higher modularity and nodal betweenness centrality mainly in the medial/lateral fronto-parietal and occipital cortices than the male group. Significant correlations between the intelligence quotient and nodal metrics were also observed in several frontal regions. Collectively, the PAGANI Toolkit shows high computational performance and good scalability for analyzing connectome big data and provides a friendly interface without the complicated configuration of computing environments, thereby facilitating high-resolution connectomics research in health and disease.

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“…However, the tools [13], [14] perform poorly due to complex algorithms and they are too balanced to sacrifice computing convenience. GraphH [6] and NXgraph [15] proposed two simplified approaches with destination-sort partition, but the performance is limited.…”

Section: A Graph Presentation and Partitionmentioning

confidence: 99%

ReGra: Accelerating Graph Traversal Applications Using ReRAM With Lower Communication Cost

et al. 2020

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There is a growing gap between data explosion speed and the improvement of graph processing systems on conventional architectures. The main reason lies in the large overhead of random access and data movement, as well as the unbalanced and unordered communication cost. The emerging metal-oxide resistive random access memory (ReRAM) has great potential to solve these in the context of processingin-memory (PIM) technology. However, the unbalanced and irregular communication under different graph organizations is not well addressed. In this paper, we present a PIM graph traversal accelerator using ReRAM with a lower communication cost named ReGra. ReGra optimizes the graph organization and communication efficiency in graph traversal. Benefiting from high density and efficient access of ReRAM, graphs are organized compactly and partitioned into processing cubes by the proposed Interval-Block Hash Balance (IBHB) method to balance graph distribution. Moreover, remote cube updates in graph traversal are converged into batched messages and transferred in a concentrated period via the custom circular round communication phase. This eliminates irregular and unpredictable inter-cube communication and overlaps partial computation and communication. Comparative experiments with previous work like Tesseract and RPBFS show that ReGra achieves better performance and yields a speedup of up to 2.2×. Besides the communication cost is reduced by up to 76%. It also achieves an average reduction in energy consumption of 70%.

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NXgraph: An efficient graph processing system on a single machine

Cited by 71 publications

References 22 publications

HyGCN: A GCN Accelerator with Hybrid Architecture

HyGCN: A GCN Accelerator with Hybrid Architecture

PAGANI Toolkit: Parallel graph‐theoretical analysis package for brain network big data

ReGra: Accelerating Graph Traversal Applications Using ReRAM With Lower Communication Cost

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