Novel Lithography-Independent Pore Phase Change Memory

Breitwisch, M.; Nirschl, T.; Chen, C.F.; Zhu, Yu; Lee, M.H.; Lamorey, M.; Burr, Geoffrey W.; Joseph, Eric; Schrott, A. G.; Philipp, J. B.; Cheek, R.; Happ, T.; Chen, S.H.; Zaidr, S.; Flaitz, P.; Bruley, J.; Dasaka, R.; Rajendran, Bipin; Rossnage, S.; Yang, Min; Chen, Y.C.; Bergmann, Ralf B.; Lung, Hsiang-Lan; Lam, C.

doi:10.1109/vlsit.2007.4339743

Cited by 108 publications

(66 citation statements)

References 3 publications

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“…We have used one of the conventional cell structures used by many other research groups (30,31). The pulse width needed to switch the cells via a single pulse using our present cell was found to be several tens of nanoseconds (depending on the voltage applied; SI Appendix, Fig.…”

Section: Methodsmentioning

confidence: 99%

Ultrafast phase-change logic device driven by melting processes

Loke

Skelton

Wang

et al. 2014

Proc. Natl. Acad. Sci. U.S.A.

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The ultrahigh demand for faster computers is currently tackled by traditional methods such as size scaling (for increasing the number of devices), but this is rapidly becoming almost impossible, due to physical and lithographic limitations. To boost the speed of computers without increasing the number of logic devices, one of the most feasible solutions is to increase the number of operations performed by a device, which is largely impossible to achieve using current silicon-based logic devices. Multiple operations in phase-change-based logic devices have been achieved using crystallization; however, they can achieve mostly speeds of several hundreds of nanoseconds. A difficulty also arises from the tradeoff between the speed of crystallization and long-term stability of the amorphous phase. We here instead control the process of melting through premelting disordering effects, while maintaining the superior advantage of phase-change-based logic devices over silicon-based logic devices. A melting speed of just 900 ps was achieved to perform multiple Boolean algebraic operations (e.g., NOR and NOT). Ab initio molecular-dynamics simulations and in situ electrical characterization revealed the origin (i.e., bond buckling of atoms) and kinetics (e.g., discontinuouslike behavior) of melting through premelting disordering, which were key to increasing the melting speeds. By a subtle investigation of the well-characterized phase-transition behavior, this simple method provides an elegant solution to boost significantly the speed of phase-change-based in-memory logic devices, thus paving the way for achieving computers that can perform computations approaching terahertz processing rates.computing | chalcogenides T he extremely high and ever-increasing demand for faster computers is currently addressed by traditional methods, such as miniaturization (to increase the number of devices), but this is rapidly becoming almost impossible, due to physical and lithographic constraints (1-4). The speed of computers is known to be determined almost solely by the performance of logic devices, i.e., their speed and number, which control most computations (or processes) in computers (5). Logic devices are mostly required to operate around 1 ns for achieving fast computations, and to transfer information between alternate devices, such as random-access memories, without delays (5). To increase the speed of computers without increasing the number of logic devices, one of the most feasible methods is to increase the number of operations performed by a device, which is largely unachievable using current silicon-based logic devices (6, 7).Multiple operations in a logic device are currently best achieved using devices comprised of phase-change nonvolatile memory materials-based on the reversible and multilevel switching of a phase-change material (PCM) between crystalline and glassy states having a contrast in physical properties, e.g., electrical resistivity (8, 9)-which can perform more than three times the number of operations than can s...

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Section: Methodsmentioning

confidence: 99%

Ultrafast phase-change logic device driven by melting processes

Loke

Skelton

Wang

et al. 2014

Proc. Natl. Acad. Sci. U.S.A.

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“…Therefore ∆S for the lower SiGe-TiN interface becomes negative as shown by the red arrows in the inset of Fig 7(a). This results in an opposite Peltier effect at the SiGe-TiN interface in the direction of current flow (6), which will in turn result in an enhanced cooling. This will make the region a good heat sink, thereby reducing the Peltier heating effect of the GST-SiGe layer due to the closer proximity with SiGe-TiN interface.…”

Section: Effect Of Varying Sige Layer Thicknessmentioning

confidence: 99%

“…Design approaches to reduce programming currents are primarily geometry based [2,[5][6][7][8][9][10][11]. Apart from the typical mushroom cell geometry [2], the most common geometry variant is the vertical pillar structure [5,12,13], which may be typically fabricated using nanowires.…”

Section: Introductionmentioning

confidence: 99%

Programming Current Reduction via Enhanced Asymmetry-Induced Thermoelectric Effects in Vertical Nanopillar Phase-Change Memory Cells

Bahl

Rajendran

Muralidharan

2015

IEEE Trans. Electron Devices

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Thermoelectric effects are envisioned to reduce programming currents in nanopillar phase change memory cells. However, due to the inherent symmetry in such a structure, the contribution due to thermoelectric effects on programming currents is minimal. In this work, we propose a hybrid phase change memory structure which incorporates a two-fold asymmetry specifically aimed to favorably enhance thermoelectric effects. The first asymmetry is introduced via an interface layer of low thermal conductivity and high negative Seebeck coefficient, such as, polycrystalline SiGe, between the bottom electrode contact and the active region comprising the phase change material. This results in an enhanced Peltier heating of the active material. The second one is introduced structurally via a taper that results in an angle dependent Thomson heating within the active region. Various device geometries are analyzed using 2D-axis-symmetric simulations to predict the effect on programming currents as well as for different thicknesses of the interface layer. A programming current reduction of up to 60% is predicted for specific cell geometries. Remarkably, we find that due to an interplay of Thomson cooling in the electrode and the asymmetric heating profile inside the active region, the predicted programming current reduction is resilient to fabrication variability.

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“…Usually, a very high current is required to generate an adequate energy to switch the cell, especially for RESET operations. To make PCM operate at CMOS compatible voltages, various cell structures have been developed to improve electrical-to-thermal efficiency through device geometry optimization [16,[22][23][24][25][26][27][28]. One effective approach has been to create sub-lithographic features to minimize the volume of the phase change material in the current path through the PCM storage element.…”

Section: Cell Structure: Pcm Storage Elementmentioning

confidence: 99%

“…The cross-sectional area between bottom electrical contact (BEC) and the phase change material layer is minimized to effectively confine the current to optimize heat generation. The sub-lithographic BEC in a mushroom cell can be formed by techniques such as the spacer process, resist trimming and the key-hole transfer process [30,31]. To further reduce the switching power requirements (RESET current), various material engineering techniques have been developed, including increasing the resistivity of either the electrode material or the phase change material and decreasing the thermal diffusion losses through the top and bottom electrode [33][34][35].…”

Section: Cell Structure: Pcm Storage Elementmentioning

confidence: 99%

Phase change memory

Lam

2011

Sci. China Inf. Sci.

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Phase change memory (PCM) is a non-volatile solid-state memory technology based on the large resistivity contrast between the amorphous and crystalline states in phase change materials. We present the physics behind this large resistivity contrast and describe how it is being exploited to create high density PCM. We address the challenges facing this technology, including the design of PCM cells, fabrication, device variability, thermal cross-talk and write disturb. We discuss the scalability, assess the performance, and examine the reliability of PCM including data retention, multi-bit storage and endurance.

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Novel Lithography-Independent Pore Phase Change Memory

Cited by 108 publications

References 3 publications

Ultrafast phase-change logic device driven by melting processes

Ultrafast phase-change logic device driven by melting processes

Programming Current Reduction via Enhanced Asymmetry-Induced Thermoelectric Effects in Vertical Nanopillar Phase-Change Memory Cells

Phase change memory

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