Novel 14-nm Scallop-Shaped FinFETs (S-FinFETs) on Bulk-Si Substrate

Abstract

In this study, novel p-type scallop-shaped fin field-effect transistors (S-FinFETs) are fabricated using an all-last high-k/metal gate (HKMG) process on bulk-silicon (Si) substrates for the first time. In combination with the structure advantage of conventional Si nanowires, the proposed S-FinFETs provide better electrostatic integrity in the channels than normal bulk-Si FinFETs or tri-gate devices with rectangular or trapezoidal fins. It is due to formation of quasi-surrounding gate electrodes on scalloping fins by a special Si etch process. The entire integration flow of the S-FinFETs is fully compatible with the mainstream all-last HKMG FinFET process, except for a modified fin etch process. The drain-induced barrier lowering and subthreshold swing of the fabricated p-type S-FinFETs with a 14-nm physical gate length are 62 mV/V and 75 mV/dec, respectively, which are much better than those of normal FinFETs with a similar process. With an improved short-channel-effect immunity in the channels due to structure modification, the novel structure provides one of possibilities to extend the FinFET scalability to sub-10-nm nodes with little additional process cost.

The CORE Sequence: A Nanoscale Fluorocarbon-Free Silicon Plasma Etch Process Based on SF6/O2Cycles with Excellent 3D Profile Control at Room Temperature

“…3D CORE.-Just like the DREAM sequence, CORE can handle 3D features too. [46][47][48][49][50] In Fig. 15 top, a total of 100 cycles of the "standard fine-tuned" CORE sequence of Fig.…”

Miniaturization of CMOS

“…Thus, new device structures, new materials, and new integration approaches have to provide new solutions. Therefore, novel promising device architectures like fin-on-insulator (FOI) FinFET [8,9,10,11], scalloped fin FinFET [12], nanowire (NW) FETs, and the stacked NW device [13,14,15] have demonstrated great improvement for short channel effects (SCEs), leakage control, and higher electron and whole mobility. The fin-on-insulator (FOI) FinFET, fabricated on the bulk Si substrate with a special process takes both advantages of bulk FinFET and SOI technologies.…”

Integration of Highly Strained SiGe in Source and Drain with HK and MG for 22 nm Bulk PMOS Transistors

“…This article mainly presents how to grow highly strained SiGe film for source and drain application for 22 nm pMOSFETs with high-k and metal gate. The high-k material is HfO 2 thin film and filling metal in the trench was B-doped W layer, both of these films are deposited by ALD technology [ 13 , 14 ]. This study provides the knowledge of how to grow and apply high-quality selective epitaxy SiGe film in the transistor structures for advanced technology nodes.…”