Normally Off n-Channel GaN MOSFETs on Si Substrates Using an SAG Technique and Ion Implantation

Kambayashi, Hiroshi; Niiyama, Yuki; Ootomo, Shinya; Nomura, Takahiro; Iwami, Masayuki; Satoh, Yuichi; Kato, S.; Yoshida, Seikoh

doi:10.1109/led.2007.909978

Cited by 63 publications

(42 citation statements)

References 16 publications

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“…Possible alternatives include Ge, GaAs, InGaAs, InAs, InSb, GaN, and perhaps others [2][3][4][5][6][7][8]. Recently published results from high performance flatband-mode [9] In 0.3 Ga 0.7 As channel enhancement-mode MOSFETs on GaAs substrate conclusively demonstrate that the historical issue of Fermi-level pinning at the GaAs/dielectric interface can be overcome [10].…”

mentioning

confidence: 99%

1 [micro sign]m gate length, In0.75Ga0.25As channel, thin body n-MOSFET on InP substrate with transconductance of 737 [micro sign]S/μm

Hill

Droopad²,

Moran

et al. 2008

Electron. Lett.

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mentioning

confidence: 99%

1 [micro sign]m gate length, In0.75Ga0.25As channel, thin body n-MOSFET on InP substrate with transconductance of 737 [micro sign]S/μm

Hill

Droopad²,

Moran

et al. 2008

Electron. Lett.

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“…GaN MOSFETs are studied for their applications to logic and power devices with low leakage currents and power consumption. [22][23][24][25][26] To further develop GaN MOSFETs, a reduction in the density of deep-level traps both at interfaces and in bulk substrates is required. Many studies toward realizing highquality MOS capacitors have been reported.…”

Section: Introductionmentioning

confidence: 99%

A transient simulation approach to obtaining capacitance–voltage characteristics of GaN MOS capacitors with deep-level traps

Fukuda

Asai

Hattori

et al. 2018

Jpn. J. Appl. Phys.

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In this study, GaN MOS capacitance-voltage device simulations considering various interface and bulk traps are performed in the transient mode. The simulations explain various features of capacitance-voltage curves, such as plateau, hysteresis, and frequency dispersions, which are commonly observed in measurements of GaN MOS capacitors and arise from complicated combinations of interface and bulk deep-level traps. The objective of the present study is to provide a good theoretical tool to understand the physics of various nonideal measured curves.

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“…Schottky barrier source/drain(S/D) structure MISFET and silicon implanted S/D MISFET have been presented in [6] and [7], respectively. The schottky barrier S/D is an attractive solution because it excludes the use of the high cost S/D ion implantation process and very high temperature activation at over 1500 C [1].…”

Section: Introductionmentioning

confidence: 99%

UV Responsive Characteristics of n-Channel Schottky Barrier MOSFET with ITO as Source/Drain Contacts

Kim¹,

Lee²,

Kim³

et al. 2011

Journal of Sensor Science and Technology

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We fabricated a schottky barrier metal oxide semiconductor field effect transistor(SB-MOSFET) by applying indium-tin-oxide(ITO) to the source/drain on a highly resistive GaN layer grown on a silicon substrate. The MOSFET, with 10 m gate length and 100 m gate width, exhibits a threshold gate voltage of 2.7 V, and has a sub-threshold slope of 240 mV/dec taken from the I DS -V GS characteristics at a low drain voltage of 0.05 V. The maximum drain current is 18 mA/mm and the maximum transconductance is 6 mS/mm at V DS =3 V. We observed that the spectral photo-response characterization exhibits that the cutoff wavelength was 365 nm, and the UV/visible rejection ratio was about 130 at V DS = 5 V. The MOSFET-type UV detector using ITO, has a high UV photo-responsivity and so is highly applicable to the UV image sensors.

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Normally Off n-Channel GaN MOSFETs on Si Substrates Using an SAG Technique and Ion Implantation

Cited by 63 publications

References 16 publications

1 [micro sign]m gate length, In0.75Ga0.25As channel, thin body n-MOSFET on InP substrate with transconductance of 737 [micro sign]S/μm

1 [micro sign]m gate length, In0.75Ga0.25As channel, thin body n-MOSFET on InP substrate with transconductance of 737 [micro sign]S/μm

A transient simulation approach to obtaining capacitance–voltage characteristics of GaN MOS capacitors with deep-level traps

UV Responsive Characteristics of n-Channel Schottky Barrier MOSFET with ITO as Source/Drain Contacts

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