2008 IEEE Custom Integrated Circuits Conference 2008
DOI: 10.1109/cicc.2008.4672095
|View full text |Cite
|
Sign up to set email alerts
|

Nonvolatile Magnetic Flip-Flop for standby-power-free SoCs

Abstract: A nonvolatile Magnetic Flip-Flop (MFF) primitive cell for SoC design libraries has been developed using a unique MRAM process. It has high design compatibility with conventional CMOS LSI designs. MFF maximum frequency was estimated to be 3.5 GHz, which is comparable to that of a normal CMOS DFF. An MFF test chip was fabricated with the process. The chip's functional performance was sufficiently high to demonstrate the potential of MFFs, which helps to reduce the power dissipation of SoCs dramatically.

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1
1
1

Citation Types

1
54
0

Year Published

2009
2009
2016
2016

Publication Types

Select...
3
2
2

Relationship

0
7

Authors

Journals

citations
Cited by 57 publications
(55 citation statements)
references
References 6 publications
(6 reference statements)
1
54
0
Order By: Relevance
“…3(a). A similar circuit topology has been used in [17], which, however, used magnetic memory devices. In this baseline NVFF, the two ReRAM devices are always used in a complementary fashion, i.e., one device is programmed to the HRS, while the other one is programmed to the LRS.…”
Section: A Baseline Non-volatile Flip-flop (Nvff-0)mentioning
confidence: 99%
“…3(a). A similar circuit topology has been used in [17], which, however, used magnetic memory devices. In this baseline NVFF, the two ReRAM devices are always used in a complementary fashion, i.e., one device is programmed to the HRS, while the other one is programmed to the LRS.…”
Section: A Baseline Non-volatile Flip-flop (Nvff-0)mentioning
confidence: 99%
“…2 in blue color. In order to add non-volatility to this basic CMOS flipflop, two ReRAM devices are inserted in the current sink of the cross-coupled inverter pair in the slave latch [13]. These ReRAM devices are used in a complementary way, i.e., one device is programmed to the HRS, while the other one is programmed to the LRS.…”
Section: A Architecturementioning
confidence: 99%
“…A non-volatile configuration point of MLUTs consists of an SRAM based Sense Amplifier (SA) associated with a couple of complementary MTJs [29]. FPGA circuits can be configured instantaneously and the high-speed SA ensures nearly the same speed as SRAM-LUT [19][20][21][22][23][24]. Thanks to the small cell area and 3D integration of MRAM, multi-context can be easily implemented, allowing dynamical and run-time reconfiguration methods [26,29,37].…”
Section: Magnetic Look-up Table (Mlut)mentioning
confidence: 99%
“…In 2008, NEC presented the first prototype based on 0.15μm hybrid process and high performance up to 3.5 GHz was shown. MFF is expected to make low standby power for electrical appliances like LCD TV, PC and portable devices in the next years [23]. MFF is the key element to build non-volatile logic circuits and allows true instant on/off and zero standby power [29].…”
Section: Magnetic Flip-flop (Mff)mentioning
confidence: 99%
See 1 more Smart Citation