Non-equal DC link Voltages in a Cascaded H-Bridge with a Selective Harmonic Mitigation-PWM Technique Based on the Fundamental Switching Frequency

Abstract

In this paper, the Selective Harmonic Mitigation-PWM (SHM-PWM) method is used in single-phase and three-phase Cascaded H-Bridge (CHB) inverters in order to fulfill different power quality standards such as EN 50160, CIGRE WG 36-05, IEC 61000-3-6 and IEC 61000-2-12. Non-equal DC link voltages are used to increase the degrees of freedom for the proposed SHM-PWM technique. In addition, it will be shown that the obtained solutions become continuous and without sudden changes. As a result, the look-up tables can be significantly reduced. The proposed three-phase modulation method can mitigate up to the 50th harmonic from the output voltage, while each switch has just one switching in a fundamental period. In other words, the switching frequency of the power switches are limited to 50 Hz, which is the lowest switching frequency that can be achieved in the multilevel converters, when the optimal selective harmonic mitigation method is employed. In single-phase mode, the proposed method can successfully mitigate harmonics up to the 50th, where the switching frequency is 150 Hz. Finally, the validity of the proposed method is verified by simulations and experiments on a 9-level CHB inverter.

An improved SHM‐PWM scheme for three‐phase seven‐level CHB inverter to improve power quality by fulfilling CIGRE WG 36‐05 and EN 50160 and sharing equal power between the H‐bridge cells

“…In literature, several modulation schemes have been proposed for controlling the output voltage waveform quality of multilevel inverters. These can be listed as sinusoidal pulse width modulation (SPWM), space vector modulation, selective harmonic elimination (SHE)‐pulse width modulation (PWM), optimal minimization of THD (OMTHD), optimal PWM (OPWM), and selective harmonic mitigation‐(SHM) PWM . Out of these PWM schemes, SHE‐PWM scheme works on the low‐switching frequency, and it is used to completely eliminate (E‐1) number of specific low‐order harmonics of the output voltage using “E” number of switching instances in each quarter cycle of the output waveform.…”

“…In Najjar et al, an optimal SHM scheme has been suggested with equally variable DC voltage sources to satisfy some specified power quality standards for both three‐phase and single‐phase seven‐level CHB inverter over the entire modulation index range. Moeini et al introduces an efficient SHM scheme that satisfies standard grid code limits using four and 12 numbers of switching instances for three‐phase and single‐phase nine‐level CHB inverter, respectively.…”

“…But it requires more number of switching instances in a quarter period to fulfill some specific power quality standards. Besides that, uneven power distribution between the H‐bridge cells of CHB inverter can occur in the aforesaid SHE‐PWM and SHM‐PWM schemes . This will affect the rating and size of both semiconductor devices and input side isolation transformers.…”

“…These can be listed as sinusoidal pulse width modulation (SPWM), space vector modulation, 15 selective harmonic elimination (SHE)-pulse width modulation (PWM), 16-26 optimal minimization of THD (OMTHD), 27,28 optimal PWM (OPWM), 29 and selective harmonic mitigation-(SHM) PWM. [30][31][32][33][34][35][36] Out of these PWM schemes, SHE-PWM scheme works on the low-switching frequency, and it is used to completely eliminate (E-1) number of specific low-order harmonics of the output voltage using "E" number of switching instances in each quarter cycle of the output waveform. The major drawback of this scheme is that it only eliminates a limited number of low-order harmonics while other harmonics (which are not incorporated into the problem) are totally uncontrolled and can attain high magnitudes.…”

“…List of Symbols: l, number of levels; e, number of H-bridge modules; i, cell number; V i , magnitude of ith cell DC voltage source, V; λ i , switching instances of ith cell, degree; V a , output phase "a" voltage, V; ω, fundamental switching frequency, rad/sec; n, harmonic order; A n , B n , magnitude of the nth harmonic Fourier series coefficients; m, modulation index; V dc , magnitude of each isolated DC-link voltage, V; B d , desired fundamental voltage component, V; I max , maximum peak of fundamental phase current component, A; φ, load power factor angle (degree); P, per-phase output active power of the inverter, W; V (rms) , rms value of fundamental phase voltage component, V; i (rms) , rms value of fundamental phase current component, A; P i , active power shared by ith cell (W); v 1 , normalized value of ith cell DC voltage source; j, number of population; k, number of dimension; g, number of generation; R, resistance value of the load, Ω; L, inductance value of the load, mH; w * r , reference rotor speed, rad/sec; w r , actual rotor speed, rad/sec; w sl , slip speed, rad/sec; w * e , commanded rotor speed, rad/sec; f , operating frequency, Hz; N * r , reference rotor speed, rpm; V ab , output line voltage, V; i a ,i b ,i c , output phase currents, A equally variable DC voltage sources to satisfy some specified power quality standards for both three-phase and singlephase seven-level CHB inverter over the entire modulation index range. Moeini et al 36 introduces an efficient SHM scheme that satisfies standard grid code limits using four and 12 numbers of switching instances for three-phase and single-phase nine-level CHB inverter, respectively.…”