Next-generation immersion scanner optimizing on-product performance for 7nm node

Yoda, Yasushi; Hayakawa, Akira; Ishiyama, Satoshi; Ohmura, Yasuhiro; Fujimoto, Issei; Hirayama, Toru; Shiba, Yuji; Masaki, Kazuo; Shibazaki, Yuichi

doi:10.1117/12.2218955

Cited by 6 publications

(3 citation statements)

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“…For EUV photoresist sensitivity to the 13.54 nm, wavelength radiation needs to be improved, while the line-width roughness (LWR) specification has to be controlled within low several nanometers [63][64][65][66][67]. Figure 1b shows NWs made by EUVL, the LER (line edge roughness) trend with increasing dose and resist quencher concentration.…”

Section: Lithography Photolithographymentioning

confidence: 99%

Silicon Nanowires for Gas Sensing: A Review

et al. 2020

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The unique electronic properties of semiconductor nanowires, in particular silicon nanowires (SiNWs), are attractive for the label-free, real-time, and sensitive detection of various gases. Therefore, over the past two decades, extensive efforts have been made to study the gas sensing function of NWs. This review article presents the recent developments related to the applications of SiNWs for gas sensing. The content begins with the two basic synthesis approaches (top-down and bottom-up) whereby the advantages and disadvantages of each approach have been discussed. Afterwards, the basic sensing mechanism of SiNWs for both resistor and field effect transistor designs have been briefly described whereby the sensitivity and selectivity to gases after different functionalization methods have been further presented. In the final words, the challenges and future opportunities of SiNWs for gas sensing have been discussed.

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Section: Lithography Photolithographymentioning

confidence: 99%

Silicon Nanowires for Gas Sensing: A Review

et al. 2020

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“…The performance of DMI systems has progressed significantly, driven in large part by the demands of the photolithography industry, which depends on sub-nm positioning at stage motions of 4 m s −1 . The high precision of these measurements relates to the need to register successive exposures during the creation of transistors, with critical dimensions currently approaching 7 nm [44]. Double-exposure techniques allocate only 0.5 nm in the uncertainty budget for stage metrology [45].…”

Section: Measuring Linear Motions With a Lasermentioning

confidence: 99%

A review of selected topics in interferometric optical metrology

Groot

2019

Rep. Prog. Phys.

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This review gathers together 15 special topics in modern interferometric metrology representing a sampling of historical, current and future developments. The selected topics cover a wide range of applications, including distance and displacement measurement, the testing of optical components, interference microscopy for surface structure analysis, form and dimensional measurements of industrial parts, and recent applications in semiconductor manufacturing and consumer electronics. Techniques range from laser Fizeau systems to dynamic ellipsometry using polarized heterodyne interferometry.

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“…To improve throughput in high volume manufacturing, the resist sensitivity to the 13.54 nm wavelength radiation of EUV needs to be improved, while the line-width roughness (LWR) specification has to be held to low single-digit nm [18]. With a 250 W source and 25 mJ/cm 2 resist sensitivity an EUV stepper should be able to process~100 wafer-per-hour (WPH).…”

Section: Challenges In Euv Lithographymentioning

confidence: 99%

The Challenges of Advanced CMOS Process from 2D to 3D

Radamson

Zhang

et al. 2017

Applied Sciences

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Abstract:The architecture, size and density of metal oxide field effect transistors (MOSFETs) as unit bricks in integrated circuits (ICs) have constantly changed during the past five decades. The driving force for such scientific and technological development is to reduce the production price, power consumption and faster carrier transport in the transistor channel. Therefore, many challenges and difficulties have been merged in the processing of transistors which have to be dealed and solved. This article highlights the transition from 2D planar MOSFETs to 3D fin field effective transistors (FinFETs) and then presents how the process flow faces different technological challenges. The discussions contain nano-scaled patterning and process issues related to gate and (source/drain) S/D formation as well as integration of III-V materials for high carrier mobility in channel for future FinFETs.

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Next-generation immersion scanner optimizing on-product performance for 7nm node

Cited by 6 publications

References 0 publications

Silicon Nanowires for Gas Sensing: A Review

Silicon Nanowires for Gas Sensing: A Review

A review of selected topics in interferometric optical metrology

The Challenges of Advanced CMOS Process from 2D to 3D

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