New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification

Abstract

-In this paper a new time-interleaved 1.5-bit MDAC circuit is proposed. This circuit is well suited to be used in ultra low-power high-speed 4-to-8 bits pipeline ADCs. The required gain of two is implemented by switching a MOS capacitor from inversion into depletion within a clock-cycle. Low-power is achieved since no operational amplifiers are required but, instead, simple source-followers are used. Simulation results of a complete front-end stage of a 6-bit 2-channel pipeline ADC demonstrate the efficiency of the proposed technique.

Design of a 14-bit Pipelined ADC using Ring Amplifier

“…The function of MDAC is to subtract the input signal from the result obtained by Sub-ADC, then multiply the difference to obtain the residual signal of the ADC at the current level, and then transmit the signal to the input terminal of the next level.Figure 2.5 shows the structure diagram of a 1.5bit capacitor flip type MDAC [8] . For capacitive flip over type MDAC, the capacitance 𝐶 𝑠 serves as both a sampling capacitor and a feedback capacitor, which is a loop feedback capacitor.…”