New CoSi/sub 2/ SALICIDE technology for 0.1 μm processes and below

Wang, Q.F.; Maex, Karen; Kubicek, Stefan; Jonckheere, R.; Kerkwijk, B.; Verbeeck, R.; Biesemans, S.; Meyer, K. De

doi:10.1109/vlsit.1995.520838

Cited by 10 publications

(8 citation statements)

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“…Figure 17 indicates that the thermal budget limit is close to 900ЊC, 30 min for Ti-capped CoSi 2 on 0.15 m wide poly-Si gates, which is much higher than what has been reported in prior work. 26 The distribution of sheet resistance shows that 90% of salicided gates have a resistance of less than 7 ⍀/ᮀ after annealing at 900ЊC for 30 min. The probability decreases below 40% for the same sheet resistance when the post insulator heat-treatment temperature increases to 950ЊC.…”

Section: Resultsmentioning

confidence: 99%

Effects of Ti-Capping on Formation and Stability of Co Silicide. I. Solid Phase Reaction of Ti to Co/Si System

Sohn¹,

Park²,

Park³

2000

J. Electrochem. Soc.

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As complementary metal oxide semiconductor (CMOS) devices are scaled down to subhalf-micrometer design rules, the self-aligned silicide (salicide) structure has become an essential technology for high speed logic in very-large-scale integrated (VLSI) circuits. 1 Among all the metal silicides, Ti silicide has been the most widely used because of its low electrical resistivity and wide applicability. However, there are difficulties with using conventional Ti salicide for future subquarter-micrometer dimensions which are related to thermal stability and narrow lines effects. These include (i) a slow rate of phase transition from high resistivity C-49 TiSi 2 to low resistivity C-54 TiSi 2 , resulting in a large increase in sheet resistance, especially for narrow lines (the narrow line effect); 2,3 (ii) relatively low thermal stability caused by agglomeration of the TiSi 2 film; 2 and (iii) suppression of TiSi 2 formation on heavily As-doped n ϩ polycrystalline Si (poly-Si) and n ϩ diffusion regions, resulting from the lower formation energy of TiAs (Ϫ110 kJ/g atom) than TiB (Ϫ84 kJ/g atom) or TiSi 2 (Ϫ74 kJ/g atom) (the dopant effect). 4,5 Even though the narrow line and dopant effects can be overcome by preamorphization implantation with As, 6 Sb, and Ge, 7 the low thermal stability still limits the process window. 8 Thus self-aligned CoSi 2 is an attractive alternative to TiSi 2 , due to both its linewidthindependent sheet resistance and high thermal stability. 9 To prevent oxidation during silicidation, TiN films are most widely used for capping the Co in the Co salicide process. 10,11 The TiN-capped Co salicide process can successfully reduce the gate resistance, even for a gate length of 0.065 m, 12 but produces nonuniform CoSi 2 /Si interfaces or CoSi 2 spiking. 11,13 Roughness at the CoSi 2 /Si interface can impact the ability to make a shallow junction, due to the possibility of increased diode leakage in regions where the silicide has grown deeper into the silicon. Several studies have reported on processes for forming a uniform and epitaxial CoSi 2 film. Solid-state reactions between a bilayer Co/Ti and Si substrate titanium-interlayer mediated epitaxy (TIME), has been suggested as a new method for forming epitaxial CoSi 2 film. 14-18 The Ti interlayer serves as an oxygen scavenger and a diffusion barrier, which limits the Co-Si reaction. Recently, a Co-Ti alloy system was proposed to form flat and heteroepitaxial CoSi 2 films on Si substrates. 19 Ti significantly widened the process window for the formation of epitaxial CoSi 2 layers. On the other hand, Tung et al. 20 demonstrated that the use of a chemical oxide prior to Co deposition [oxide mediated epitaxy (OME)] resulted in the formation of highly uniform epitaxial CoSi 2 films. In addition, an organometallic chemical vapor deposited (OMCVD) carbonic cobalt was reported to produce thick and uniform epitaxial CoSi 2 films on Si(100) substrates after annealing at 800ЊC for 5 min. 21 Unfortunately, the TIME process has serious problems, such as the forma...

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Section: Resultsmentioning

confidence: 99%

Effects of Ti-Capping on Formation and Stability of Co Silicide. I. Solid Phase Reaction of Ti to Co/Si System

Sohn¹,

Park²,

Park³

2000

J. Electrochem. Soc.

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“…Issues with TiSi such as a narrow process window and variability with linewidth [2] make CoSi 2 more desirable with smaller technologies. CoSi 2 has been used successfully to sizes below 0.10um poly gate [3].…”

Section: Introductionmentioning

confidence: 99%

Optimized cobalt silicide formation through etch process improvements

2003

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Cobalt silicide is used to reduce contact resistance for sub-micron technology such as 0.25um CMOS. At National Semiconductor, a thin oxide is used to protect areas that are not to be silicided. The selective removal of this oxide to form the silicide mask is critical as it occurs in the highly sensitive cobalt silicide module where neither over nor under etch is acceptable. The final etch uses a low power, CHF 3 /Ar recipe with good across wafer uniformity. In keeping with the advanced process control methodology at National, the etch is end pointed to reduce wafer-to-wafer and etch chamber variability. This paper contains integration aspects of the cobalt silicide module as well as the specifics of the new etch process. The effects of power, pressure and gas flows and details of the end point set up are reviewed, as well as cross section analysis and electrical responses.

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“…Salicide is a critical process that impacts key IC performance outputs such as gate delay and transistor drive current, and it contains some flavor of both front-end and back-end CMOS processing [1]. Technologically, salicide is challenging because research is being conducted simultaneously on materials such as titanium [2], [3], cobalt [4], [5], and nickel [6], and on technology modifications such as preamorphizing implants [7], refractory metal implants [8], capping layers [9], and high-temperature sputtering [10].…”

Section: Introductionmentioning

confidence: 99%

A model-based approach for process design and its application to the titanium salicide process

Apte

Saxena

Rao

et al. 1998

IEEE Trans. Semicond. Manufact.

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Process technology development constitutes a significant cost in manufacturing integrated circuits. In this paper, we present a model-based approach for developing new process technology rapidly and inexpensively, using the salicide process to demonstrate the concepts. This approach is applied to evaluate performance tradeoffs, to develop insight into the underlying process physics, to quantify the impact of the salicide process on the device and circuit performance, and to estimate the process variability. The key idea of this approach is to group a sequence of process steps into a process module, and build simple and accurate process models for the module. The paper also illustrates the use of this model-based approach in synthesizing optimal processes rapidly based on requirements, contributing to the reduction of technology development cost and cycle time.

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New CoSi/sub 2/ SALICIDE technology for 0.1 μm processes and below

Cited by 10 publications

References 0 publications

Effects of Ti-Capping on Formation and Stability of Co Silicide. I. Solid Phase Reaction of Ti to Co/Si System

Effects of Ti-Capping on Formation and Stability of Co Silicide. I. Solid Phase Reaction of Ti to Co/Si System

Optimized cobalt silicide formation through etch process improvements

A model-based approach for process design and its application to the titanium salicide process

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