Networks on Chip with Provable Security Properties

Wassel, Hassan M. G.; Gao, Ying; Oberg, Jason; Huffmire, Ted; Kastner, Ryan; Chong, Frederic T.; Sherwood, Timothy

doi:10.1109/mm.2014.46

Cited by 32 publications

(29 citation statements)

References 22 publications

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“…They include temporal network partitioning, based on high [7] and bounded [8] priorities arbitration schemes. Furthermore, the work of [9] proposes random arbitration and adaptive routing as protection techniques.…”

Section: Related Workmentioning

confidence: 99%

Gossip NoC -- Avoiding Timing Side-Channel Attacks through Traffic Management

Reinbrecht

Susin

Bossuet³

et al. 2016

2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

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Abstract-The wide use of Multi-processing systems-on-chip (MPSoCs) in embedded systems and the trend to increase the integration between devices have turned these systems vulnerable to attacks. Malicious software executed on compromised IP may become a serious security problem. By snooping the traffic exchanged through the Network-on-chip (NoC), it is possible to infer sensitive information such as secrets keys. NoCs are vulnerable to side channel attacks that exploit traffic interference as timing channels. When multiple IP cores are infected, they can work coordinately to implement a distributed timing attack (DTA). In this work we present for the first time the execution of a DTA and a secure enhanced NoC architecture able to avoid the timing attacks. Results show that our NoC proposal can avoid the DTA with an increase of only 1% in area and 0.8% in power regarding the whole chip design.

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Section: Related Workmentioning

confidence: 99%

Gossip NoC -- Avoiding Timing Side-Channel Attacks through Traffic Management

Reinbrecht

Susin

Bossuet³

et al. 2016

2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

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show abstract

Section: Related Workmentioning

confidence: 99%

“…In [3][4][5], hard Quality-of-Service mechanisms are integrated into a NoC in order to guarantee the attacker traffic performance under different data injection rates of the sensible process. Temporal network partitioning (TNP) is adopted in [3][4]. In [3] two techniques are employed: i) high priority arbitration, which establishes the lower communication privileges to the sensible traffic; and ii) IEEE EMBEDDED SYSTEMS LETTERS bounded priority (reserved priority with static limits: RPSL), similar to the TNP but including virtual channels for sensible data.…”

Section: Related Workmentioning

confidence: 99%

“…In [3] two techniques are employed: i) high priority arbitration, which establishes the lower communication privileges to the sensible traffic; and ii) IEEE EMBEDDED SYSTEMS LETTERS bounded priority (reserved priority with static limits: RPSL), similar to the TNP but including virtual channels for sensible data. In [4] is implemented a bounded priority arbitration, called surf scheduling at each router port. In [5] a deterministic routing which transmits messages for multiple disjoint paths is employed.…”

Section: Related Workmentioning

confidence: 99%

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NoC-Based Protection for SoC Time-Driven Attacks

Sepulveda

Diguet

Strum

et al. 2015

IEEE Embedded Syst. Lett.

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“…However, a practical timing attack on NoCbased MPSoC has not been reported yet. The exploration of NoC channels as a leakage source was addressed by Yao et al [14], Wassel [15] and Sepúlveda et al [16]. The works of [14] [15] propose the integration of hard QoS mechanism to isolate the sensitive information.…”

Section: Introductionmentioning

confidence: 99%

Side channel attack on NoC-based MPSoCs are practical: NoC Prime+Probe attack

Reinbrecht¹,

Susin²,

Bossuet³

et al. 2016

2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI)

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Many authors have shown how to break the AES cryptographic algorithm with side channel attacks, specially the timing attacks oriented to caches, like Prime+Probe. In this paper, we present a practical timing attack on NoC that improves Prime+Probe technique. Our attack targets the communication between an ARM Cortex-A9 core and a shared cache memory. Furthermore, we evaluate a secure enhanced NoC applied as a countermeasure of the timing attack. Finally, we demonstrate that attacks on MPSoCs through the NoC are a real threat and need to be further explored.

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Networks on Chip with Provable Security Properties

Cited by 32 publications

References 22 publications

Gossip NoC -- Avoiding Timing Side-Channel Attacks through Traffic Management

Gossip NoC -- Avoiding Timing Side-Channel Attacks through Traffic Management

NoC-Based Protection for SoC Time-Driven Attacks

Side channel attack on NoC-based MPSoCs are practical: NoC Prime+Probe attack

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