Nanoimprint lithography enables memristor crossbars and hybrid circuits

Xia, Qiangfei; Wu, Wei; Jung, Gun‐Young; Pi, Shuang; Lin, Peng; Chen, Yong; Li, Xuema; Li, Zhiyong; Wang, Shih-Yuan; Williams, R. Stanley

doi:10.1007/s00339-015-9038-y

Cited by 9 publications

(5 citation statements)

References 38 publications

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“…[3][4][5][6][7] This allows integration of memristors into micro-and nanoelectronic devices using traditional nanofabrication techniques. [8][9][10] Nowadays, memristors are considered to be one of the key elements of newly developing neuromorphic electronics, 11,12 since it functionally mimics the synaptic plasticity of biological neurons [13][14][15] and thus is suitable for bioinspired technologies. 14,16,17 Neuromorphic electronics was triggered by the discovery of principal electric phenomena in a neuron cell membrane in the early 1950's.…”

Section: Introductionmentioning

confidence: 99%

Inkjet assisted fabrication of planar biocompatible memristors

et al. 2019

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Section: Introductionmentioning

confidence: 99%

Inkjet assisted fabrication of planar biocompatible memristors

et al. 2019

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“…Both methods require expensive equipment and multiple fabrication steps including a high temperature annealing step and a "forming" step. Other several methods of fabrications have been proposed such as electrohydrodynamic inkjet printing technology [22] or the conventional photolithography technology [23,24]. A nonvolatile nanoscale TiO2 device with synaptic properties was recently created by the Stanley Williams group at HP [25].…”

Section: Memristormentioning

confidence: 99%

Ternary Logic Gates Design in the Hybrid Memristor-TMD and Graphene FET

Olakunle,

Hazzazi,

Chavda

et al. 2024

Preprint

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Multiple valued logic (MVL) has proven to be a better alternative and solution to the challenges of traditional binary logic because of its fast computation, fewer interconnects, and small die. It is a potential candidate for future digital design because it allows energy-efficient, low-complex, and high-speed circuits. This paper introduces a new resistive-load two-dimensional field effect transistor-based ternary logic gates, wherein the active resistive-load is replaced with memristor to reduce chip area and power consumption. A memristor-based standard ternary inverter (STI) is designed using GNRFET, MoS2 FET, WSe2 FET, and FinFET, and their performance metric such as delay, power, and energy delay product (EDP) are analyzed. The results show that the proposed design achieves 50% reduction in circuit area, the average power dissipation is reduced by 11.7X, 6.8X, and 3.2X for GNRFET, MoS2 FET, and WSe2 FET, respectively, as compared to FinFET-based ternary inverter. Moreso, other logic gates such as OR, NOR, AND and NAND were simulated in T-SPICE EDA tool, and the results and truth table are in good agreement.

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“…In addition, systemlevel integration requires reliable 3D integration of crossbar arrays with underlying CMOS circuits. Direct fabrication of crossbar arrays on a foundry-developed CMOS chip should guarantee precise alignment and a low thermal budget [50].…”

Section: Current and Future Challengesmentioning

confidence: 99%

“…The NIL molds can be used repeatedly, allowing mass production of a crossbar structure in a highly costeffective way. To date, NIL has been successfully applied in the direct fabrication of memristor crossbar arrays on top of a foundry-made CMOS chip with optimized planarization techniques [50].…”

Section: Advances In Science and Technology To Meet Challengesmentioning

confidence: 99%

Roadmap on emerging hardware and technology for machine learning

et al. 2020

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Recent progress in artificial intelligence is largely attributed to the rapid development of machine learning, especially in the algorithm and neural network models. However, it is the performance of the hardware, in particular the energy efficiency of a computing system that sets the fundamental limit of the capability of machine learning. Data-centric computing requires a revolution in hardware systems, since traditional digital computers based on transistors and the von Neumann architecture were not purposely designed for neuromorphic computing. A hardware platform based on emerging devices and new architecture is the hope for future computing with dramatically improved throughput and energy efficiency. Building such a system, nevertheless, faces a number of challenges, ranging from materials selection, device optimization, circuit fabrication, and system integration, to name a few. The aim of this Roadmap is to present a snapshot of emerging hardware technologies that are potentially beneficial for machine learning, providing the Nanotechnology readers with a perspective of challenges and opportunities in this burgeoning field.

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Nanoimprint lithography enables memristor crossbars and hybrid circuits

Cited by 9 publications

References 38 publications

Inkjet assisted fabrication of planar biocompatible memristors

Inkjet assisted fabrication of planar biocompatible memristors

Ternary Logic Gates Design in the Hybrid Memristor-TMD and Graphene FET

Roadmap on emerging hardware and technology for machine learning

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