2008
DOI: 10.1108/03056120810848743
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Nano‐ and micro‐filled conducting adhesives for z‐axis interconnections: new direction for high‐speed, high‐density, organic microelectronics packaging

Abstract: PurposeThe purpose of this paper is to discuss the use of epoxy‐based conducting adhesives in z‐axis interconnections.Design/methodology/approachA variety of conductive adhesives with particle sizes ranging from 80 nm to 15 μm were laminated into printed wiring board substrates. SEM and optical microscopy were used to investigate the micro‐structures, conducting mechanism and path. The mechanical strength of the various adhesives was characterized by 90° peel test and measurement of tensile strength. Reliabili… Show more

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Cited by 24 publications
(10 citation statements)
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References 18 publications
(17 reference statements)
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“…Morphological studies showed that the decreased resistivity was the result of sintering of Ag nanoparticles within the polymer matrix. Das and co-workers developed Ag-based nano-and micro-filled conductive adhesives for z-axis interconnections (87). It was found that with increasing curing temperature, the resistivity of the Ag-filled paste decreased due to sintering of the metal particles.…”
Section: Componentmentioning
confidence: 99%
“…Morphological studies showed that the decreased resistivity was the result of sintering of Ag nanoparticles within the polymer matrix. Das and co-workers developed Ag-based nano-and micro-filled conductive adhesives for z-axis interconnections (87). It was found that with increasing curing temperature, the resistivity of the Ag-filled paste decreased due to sintering of the metal particles.…”
Section: Componentmentioning
confidence: 99%
“…The processing costs of via-hole filling and interlayer interconnection account for about 70 % (via-hole filling: about 40 %, interlayer interconnection: about 30 %) of the overall production cost for the 3D package. To overcome the limitations of the conventional Cu electroplating technique, several via-hole filling techniques have been reported that use different conductive materials (e.g., solder material [12,13] or a conductive adhesive [8,14,15]). However, these via-hole filling techniques do not eliminate or simplify the interlayer interconnection process because these studies focused on via-hole filling for individual device wafers.…”
Section: Introductionmentioning
confidence: 99%
“…A nanoscale pressureless silver paste was developed for replacing a pressure assisted micro-sized silver paste as well (Chou et al, 2017). Application of pressure during the paste sintering puts increased demands on production in the industry automation (Das et al, 2008;Felba, 2018;Göbl, 2009). In addition, the damage of electronic components occurs during the sintering process (Zhang et al, 2012).…”
Section: Introductionmentioning
confidence: 99%