Motion Estimation System Design

Efficient and configurable full-search block-matching processors

“…This restriction will imply the usage of a slightly smaller search area, composed by only candidate macroblocks in each row. In fact, for an array processor composed by processing cores (each one with active PEs) and a search range initially defined in the interval , corresponding to a total of candidate macroblocks defined in a pixel search window, the effective number of candidate macroblocks in each row of the search area is given by (1) with a maximum deviation from the initial value given by (2) The number of pixels that compose the effective search area is (3) and the number of passive PEs between each of the active blocks is given by , with the rightmost passive block accommodating the columns of passive PEs of the connection block (4) The number of clock cycles required to estimate the motion vector for a given reference macroblock in a processor composed by processing cores is given by (5) In fact, the search area can be split in three different regions (A, B, and C), as illustrated in Fig. 11.…”

“…Motion estimation requires a huge amount of computations [1], which justifies the great research effort that has been made to develop efficient dedicated architectures and specialized processors [2]- [4]. Besides the FSBM algorithm, which is extremely regular and suitable for implementations based on array structures [5], other faster block-matching algorithms have been also proposed [6].…”

A New Efficient VLSI Architecture for Full Search Block Matching Motion Estimation

“…Motion estimation requires a huge amount of computations. Consequently, a great research effort has been made to develop efficient dedicated structures and specialized processors [6]. Due to their regular processing scheme and simple control structures, FSBM algorithms have been the most widely used in VLSI implementations, providing optimal estimation results and leading to fast and efficient processing structures.…”