MoS₂ Memtransistors Fabricated by Localized Helium Ion Beam Irradiation

Abstract

Two-dimensional layered semiconductors have recently emerged as attractive building blocks for next-generation low-power non-volatile memories. However, Hongzhou Zhang: hozhang@tcd.ie 1 arXiv:1811.09545v1 [cond-mat.mtrl-sci] 23 Nov 2018 † J.J. and D.K. contributed equally to this project. D.K. performed electrical measurements on samples of different layer thickness and irradiation dose, as well as atomic force microscopy and scanning electron microscopy. CVD growth of MoS 2 monolayers was carried out by C.P.C. Mechanically-exfoliated devices were prepared by J.J. and D.K. Raman and PL spectroscopy was carried out by C.P.C. and analysed by P.M.. J.J and D.K. carried out EBL to fabricate the FET devices. H.S. assisted with fabrication and wirebonding of devices tested in Peking University (PKU). D.K., J.J. and P.M. carried out the HIM irradiations in Trinity College Dublin (TCD) while J.J and Y.Z. conducted the HIM exposures in PKU. J.J carried out the electrical tests (endurance and potentiation) with assistance from H.S and Y.Z in PKU. P.M. performed FIB processing of irradiated devices and carried out TEM of the cross-sectioned lamellae with assistance from C.D.. D.S.F. carried out helium exposures and TEM imaging of the plan-view irradiated devices after J.J. transferred the samples onto TEM grids. Z.L. oversaw the electrical characterisation work in PKU, while R.Z. and J.X. facilitated microscopy experiments in PKU. N.M and G.S.D. oversaw the material growth process and spectroscopic experiments in TCD. J.J.B. and H.Z. conceived the study and supervised the project. The manuscript was written by J.J., D.K. and P.M. All authors agreed with the final version of the paper.

Two-Dimensional Near-Atom-Thickness Materials for Emerging Neuromorphic Devices and Applications

“…(iii) TEM image of the irradiated (red) fissure region and adjacent (green and blue) regions on a mechanically exfoliated suspended few-layer MoS 2 sample. Reprinted with permission from ( Jadwiszczak et al., 2019 ). Copyright 2019 American Chemical Society.…”

“…Laterally configured 2D materials are beneficial for devising 2D vdW heterostructures-based memtransistors by vertically assembling 2D layers in an open architecture. Many studies employed CVD-grown monolayer MoS 2 in lateral memtransistors ( Jadwiszczak et al., 2019 ; Sangwan et al., 2015 , 2018 ; Wang et al., 2019a ; Xie et al., 2017 ). Sangwan et al.…”

“…reported a multi-terminal memtransistor based on CVD-grown polycrystalline monolayer MoS 2 by utilizing small grain sizes and ultrathin dielectrics (20 nm of hafnium dioxide [HfO 2 ]) as the gate dielectric ( Wang et al., 2019a ). Moreover, post-growth defect engineering has shown promise for modifying (tailoring) the behavior of MoS 2 memtransistors ( Jadwiszczak et al., 2019 ; Xie et al., 2017 ), which will be discussed further in the next subsection. In addition to adopting 2D MoS 2 layers, Yang et al.…”

“…It was verified that the Schottky barrier at the MoS 2 /metal interface could be tuned by the local redistribution of defects, especially grain boundaries, in monolayer MoS 2 ( Sangwan et al., 2018 ). Additionally, post-growth defect engineering schemes on monolayer MoS 2 memtransistors were demonstrated using helium-ion (He + ) beam irradiation ( Jadwiszczak et al., 2019 ) or electron-beam irradiation ( Xie et al., 2017 ). Jadwiszczak et al.…”

Two-dimensional ferroelectric channel transistors integrating ultra-fast memory and neural computing

“…3 The computing and memory components of modern computers are physically separated, 4 and massive communication increases unexpected power consumption and degrades efficiency, causing the so-called von Neumann bottleneck. 5 Emerging memory devices such as memristors, 6 memtransistors, 7 phase change memory, 8 electrical double-layer transistors, 9 two-dimensional (2D) heterojunction devices, 10 and ferroelectric field effect transistors (FeFETs) 11 are used to perform analog computation in an attempt to break out of the dilemma. FeFETs with switchable electric dipoles, fast operation 12,13 and non-destructive readout 14 are ideal for building low-power, 12 high-efficiency memory computing integrated systems.…”