Monolithically Patterned Wide–Narrow–Wide All-Graphene Devices

Unluer, Dincer; Tseng, Frank; Ghosh, Avik W.; Stan, Mircea R.

doi:10.1109/tnano.2010.2060348

Cited by 18 publications

(24 citation statements)

References 31 publications

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“…Figure 2a shows the quantum capacitance of a N = 7 GNR as a function of the relative position of the Fermi level, i.e., E C -E F where E C is the conduction band edge and E F is the Fermi level, calculated using the expressions from the Appendix for the 1D-3D cases. We have, as in all simulations in the present work, taken the first two subbands with a subband separation of 0.4 eV [43] into account, assumed GNRs with n-type conductivity, modeled the residual electron concentration by assuming a homogeneous n-type doping of the GNR of 2ˆ10 20 cm´3 which corresponds to an electron sheet density of 7ˆ10 12 cm´2, and used a relative dielectric constant of 1.8 for the GNR. It can be seen from Figure 2a that the quantum capacitance for the 1D case can easily exceed C q assuming 3D conditions by one order of magnitude due to the huge qualitative and quantitative differences between the 1D and 3D densities of state.…”

Section: Modeling the Density Of States And Quantum Capacitance Of 1dmentioning

confidence: 99%

Simulation of 50-nm Gate Graphene Nanoribbon Transistors

et al. 2016

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An approach to simulate the steady-state and small-signal behavior of GNR MOSFETs (graphene nanoribbon metal-semiconductor-oxide field-effect transistor) is presented. GNR material parameters and a method to account for the density of states of one-dimensional systems like GNRs are implemented in a commercial device simulator. This modified tool is used to calculate the current-voltage characteristics as well the cutoff frequency f T and the maximum frequency of oscillation f max of GNR MOSFETs. Exemplarily, we consider 50-nm gate GNR MOSFETs with N = 7 armchair GNR channels and examine two transistor configurations. The first configuration is a simplified MOSFET structure with a single GNR channel as usually studied by other groups. Furthermore, and for the first time in the literature, we study in detail a transistor structure with multiple parallel GNR channels and interribbon gates. It is shown that the calculated f T of GNR MOSFETs is significantly lower than that of GFETs (FET with gapless large-area graphene channel) with comparable gate length due to the mobility degradation in GNRs. On the other hand, GNR MOSFETs show much higher f max compared to experimental GFETs due the semiconducting nature of the GNR channels and the resulting better saturation of the drain current. Finally, it is shown that the gate control in FETs with multiple parallel GNR channels is improved while the cutoff frequency is degraded compared to single-channel GNR MOSFETs due to parasitic capacitances of the interribbon gates.

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Section: Modeling the Density Of States And Quantum Capacitance Of 1dmentioning

confidence: 99%

Simulation of 50-nm Gate Graphene Nanoribbon Transistors

et al. 2016

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“…Nevertheless, its narrow stripes with widths less than 100 nm, known as graphene nanoribbons (GNRs), are quasi-one-dimensional materials exhibiting finite energy gaps [3]. Because of their excellent electrical and mechanical properties and their ease of orientation during synthesis, GNRs have demonstrated their potential as important material in electronic applications, specifically as the channel for transistors [4][5][6][7][8]. In recent years, the fabrication of a 100 GHz transistor from Wafer-Scale Epitaxial graphene [9], as well as a high-mobility GNR-FET operating at low voltage at room temperature [10] have been reported.…”

Section: Introductionmentioning

confidence: 99%

Electronic properties of a dual-gated GNR-FET under uniaxial tensile strain

Moslemi

Sheikhi

Saghafi

et al. 2012

Microelectronics Reliability

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“…11b. The rest of the graphene-metal contacts are Ohmic to ensure proper operation and this is achieved by using wide GNRs [Unluer et al 2011]. Both Schottky diode and sleep-FET receive the same restore signal.…”

Section: Physical Implementationmentioning

confidence: 99%

Low-Power Heterogeneous Graphene Nanoribbon-CMOS Multistate Volatile Memory Circuit

Khasanvis

Habib

Rahman

et al. 2015

J. Emerg. Technol. Comput. Syst.

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Graphene is an emerging nanomaterial believed to be a potential candidate for post-Si nanoelectronics due to its exotic properties. Recently, a new graphene nanoribbon crossbar (xGNR) device was proposed which exhibits negative differential resistance (NDR). In this article, a multistate memory design is presented that can store multiple bits in a single cell enabled by this xGNR device, called graphene nanoribbon tunneling random access memory (GNTRAM). An approach to increase the number of bits per cell is explored alternative to physical scaling to overcome CMOS SRAM limitations. A comprehensive design for quaternary GNTRAM is presented as a baseline, implemented with a heterogeneous integration between graphene and CMOS. Sources of leakage and approaches to mitigate them are investigated. This design is extensively benchmarked against 16nm CMOS SRAMs and 3T DRAM. The proposed quaternary cell shows up to 2.27× density benefit versus 16nm CMOS SRAMs and 1.8× versus 3T DRAM. It has comparable read performance and is power efficient up to 1.32× during active period and 818× during standby against high-performance SRAMs. Multistate GNTRAM has the potential to realize high-density low-power nanoscale embedded memories. Further improvements may be possible by using graphene more extensively, as graphene transistors become available in the future.

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Monolithically Patterned Wide–Narrow–Wide All-Graphene Devices

Cited by 18 publications

References 31 publications

Simulation of 50-nm Gate Graphene Nanoribbon Transistors

Simulation of 50-nm Gate Graphene Nanoribbon Transistors

Electronic properties of a dual-gated GNR-FET under uniaxial tensile strain

Low-Power Heterogeneous Graphene Nanoribbon-CMOS Multistate Volatile Memory Circuit

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