Monolithic Integration of Silicon Nanowires With a Microgripper

Ozsun, Ozgur; Alaca, B. Erdem; Leblebici, Yusuf; Yalçınkaya, Arda Deniz; Yildiz, Izzet; Yılmaz, Mehmet; Zervas, M.N.

doi:10.1109/jmems.2009.2034340

Cited by 12 publications

(14 citation statements)

References 17 publications

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“…2009 799-807 Monolithic Integration of Silicon Nanowires With a Microgripper. Ozsun, O., +, JMEMS Dec. 20091335-1344 Monolithic Integration of Silicon Nanowires With a Microgripper. Ozsun, O., +, JMEMS Dec. 2009 …”

Section: Nanotechnologymentioning

confidence: 99%

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2009 Index Journal of Microelectromechanical Systems Vol. 18

2009

J. Microelectromech. Syst.

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Section: Nanotechnologymentioning

confidence: 99%

“…De Volder, M., +, JMEMS Oct. 20091100-1104 Monolithic Integration of Silicon Nanowires With a Microgripper. Ozsun, O., +, JMEMS Dec. 20091335-1344 Moving Polymer Waveguides and Latching Actuator for 2 2 2 MEMS Optical Switch. Liu, H.-B., +, JMEMS June 2009 …”

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confidence: 99%

2009 Index Journal of Microelectromechanical Systems Vol. 18

2009

J. Microelectromech. Syst.

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“…Another method uses time multiplexed alternating process (TMAP) etching, also known as deep reactive ion etching (DRIE) or Bosch process in combination with high temperature oxidation to form vertical stacks of SiNWs. Several groups, including the authors, have reported on variations of the TMAP-DRIE process for the fabrication of vertically stacked SiNWs arrays for micro-electro-mechanical-systems MEMS [12] and FET devices [13,14]. Nevertheless, the SiNW fabrication typically relies on thermal oxidation and/or hydrogen annealing techniques [7,8,13,14] which increase the temperature budget.…”

Section: Introductionmentioning

confidence: 99%

Top-down fabrication of very-high density vertically stacked silicon nanowire arrays with low temperature budget

Zervas

Sacchetto

Micheli

et al. 2011

Microelectronic Engineering

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“…Standard techniques for the preparation of silicon wires include top-down and/or bottom-up approaches [19][20][21]. These methods may include several steps, the use of specialized equipment and in some cases the application of high temperatures and/or pressures [22,23].…”

Section: Introductionmentioning

confidence: 99%

Self-Assembled Peptide Nanotubes as an Etching Material for the Rapid Fabrication of Silicon Wires

et al. 2011

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This study has evaluated self-assembled peptide nanotubes (PNTS) and nanowires (PNWS) as etching mask materials for the rapid and low-cost fabrication of silicon wires using reactive ion etching (RIE). The self-assembled peptide structures were fabricated under mild conditions and positioned on clean silicon wafers, after which these biological nanostructures were exposed to an RIE etching process. Following this treatment, the structure of the remaining nanotubes and nanowires was analyzed by scanning electron microscopy (SEM). Important differences in the behavior of the nanotubes and the nanowires were observed after the RIE process. The nanotubes remained intact while the nanowires were destroyed by the RIE process. The instability of the peptide nanowires during this process was further confirmed with focused ion beam milling experiments. The PNTS could stand energetic argon ions for around 32 s while the PNWS resisted only 4 s before becoming milled. Based on these results, selfassembled PNTS were further used as an etching mask to fabricate silicon wires in a rapid and low-cost manner. The obtained silicon wires were subjected to structural and electrical characterization by SEM and I-V measurements. Additionally, the fabricated silicon structures were functionalized with fluorescent molecules via a biotin-streptavidin interaction in order to probe their potential in the development of biosensing devices.

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Monolithic Integration of Silicon Nanowires With a Microgripper

Cited by 12 publications

References 17 publications

2009 Index Journal of Microelectromechanical Systems Vol. 18

2009 Index Journal of Microelectromechanical Systems Vol. 18

Top-down fabrication of very-high density vertically stacked silicon nanowire arrays with low temperature budget

Self-Assembled Peptide Nanotubes as an Etching Material for the Rapid Fabrication of Silicon Wires

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