Monolithic and Single-Crystalline Aluminum–Silicon Heterostructures

Wind, Lukas; Böckle, Raphael; Sistani, Masiar; Schweizer, Peter; Maeder, Xavier; Michler, Johann; Murphey, Corban; Cahoon, James F.; Weber, Walter M.

doi:10.1021/acsami.2c04599

Cited by 18 publications

(43 citation statements)

References 59 publications

(80 reference statements)

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“…This is well below the Si–Al binary eutectic temperature of 577 °C . It has recently been noted that the exchange rate between Al and Si can be enhanced as the width of the device is decreased, which may explain the reaction we observe here …”

Section: Structural Characterizationsupporting

confidence: 48%

Silicon–Aluminum Phase-Transformation-Induced Superconducting Rings

et al. 2022

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The development of devices that exhibit both superconducting and semiconducting properties is an important endeavor for emerging quantum technologies. We investigate superconducting nanowires fabricated on a silicon-on-insulator (SOI) platform. Aluminum from deposited contact electrodes is found to interdiffuse with Si along the entire length of the nanowire, over micrometer length scales and at temperatures well below the Al–Si eutectic. The phase-transformed material is conformal with the predefined device patterns. The superconducting properties of a transformed mesoscopic ring formed on a SOI platform are investigated. Low-temperature magnetoresistance oscillations, quantized in units of the fluxoid, h/2e, are observed.

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Section: Structural Characterizationsupporting

confidence: 48%

Silicon–Aluminum Phase-Transformation-Induced Superconducting Rings

et al. 2022

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“…In contrast, Al-Si junctions show mid-gap Fermi level pinning, resulting in an ambipolar transfer characteristic. [44,62] In this respect, approaches to tune the strength of the Fermi level pinning were already published, as for example, introducing (nitride-)interlayers [14] or layers of carbon nanotubes [63] between the metal and semiconductor, Small 2022, 2204178 utilizing different passivations [64,65] or van der Waals stacking approaches, [66,67] leading to a reduction of the tunneling barrier thickness. Coinciding with a gradual increase of the oncurrent in p-mode (V TG = −5 V), due to a lower band-gap with increasing Ge content and larger carrier concentration, the conductivity of the intrinsic point (point of lowest conductivity) is increasing by orders of magnitude and is shifted to higher gate-voltages for increasing Ge content.…”

Section: Resultsmentioning

confidence: 99%

“…[32] Instead, singleelementary Al contacts to Si/Ge are obtained. [36,44] Moreover, the Al-Si 1−x Ge x material system retains its elementary composition even in the event of applying subsequent annealing steps, thus allowing for the formation of reliable and abrupt metalsemiconductor junctions. In contrast, other metals tend to form various temperature-as well as crystal orientation dependent silicide or germanide alloy phases within the finally obtained structure.…”

Section: Resultsmentioning

confidence: 99%

Composition Dependent Electrical Transport in Si_1−xGe_xNanosheets with Monolithic Single‐Elementary Al Contacts

Wind

Sistani

Böckle

et al. 2022

Small

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and drain electrodes in highly scaled p-channel field-effect transistors (FETs) for the realization of very-large-scale integration (VLSI) systems. [1] Despite these efforts, the continuous scaling of metaloxide-semiconductor field-effect transistors (MOSFETs) is approaching physical limits where the nature of deterministic charge carrier separation between source and drain by an energy barrier is not applicable anymore. [2,3] In the quest of overcoming scaling limitations, new lines of research arose. Device research has shifted toward new architectures, materials, and technologies to enable "More than Moore" paradigms, [4] extending the mature Si complementary metal-oxidesemiconductor (CMOS) platform. [5] In this regard, Si 1−x Ge x and Ge active regions integrated on Si platforms are promising candidates for future optoelectronic devices [6] and the realization of energy efficient steep subthreshold switches such as band-to-band tunneling transistors (TFETs), [7,8] negative capacitance Ge nanowire FETs, [9,10] and positive feedback FETs. [11] Conventionally, degenerately doped semiconductor regions in combination with thin layers made of transition-metal semiconductor alloys, such as metalsilicides [12] and metal-germanides, [13] have been used to obtain ohmic contacts to most Si 1−x Ge x and Ge based devices. Toward the achievement of ohmic contacts, pinning-free metal semiconductor contacts have been explored in Si and Ge through Si 1−x Ge x is a key material in modern complementary metal-oxide-semiconductor and bipolar devices. However, despite considerable efforts in metal-silicide and -germanide compound material systems, reliability concerns have so far hindered the implementation of metal-Si 1−x Ge x junctions that are vital for diverse emerging "More than Moore" and quantum computing paradigms. In this respect, the systematic structural and electronic properties of Al-Si 1−x Ge x heterostructures, obtained from a thermally induced exchange between ultrathin Si 1−x Ge x nanosheets and Al layers are reported. Remarkably, no intermetallic phases are found after the exchange process. Instead, abrupt, flat, and void-free junctions of high structural quality can be obtained. Interestingly, ultra-thin interfacial Si layers are formed between the metal and Si 1−x Ge x segments, explaining the morphologic stability. Integrated into omega-gated Schottky barrier transistors with the channel length being defined by the selective transformation of Si 1−x Ge x into single-elementary Al leads, a detailed analysis of the transport is conducted. In this respect, a report on a highly versatile platform with Si 1−x Ge x composition-dependent properties ranging from highly transparent contacts to distinct Schottky barriers is provided. Most notably, the presented abrupt, robust, and reliable metal-Si 1−x Ge x junctions can open up new device implementations for different types of emerging nanoelectronic, optoelectronic, and quantum devices.

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“…Regarding the on‐currents the diameter (here: d NW = 80 nm) needs to be taken into account as well, as it is not possible to fully deplete the semiconductor in comparison to thinner NWs. [ 57 ] Lately, it was shown that the Al‐Si exchange can also be used on SOI‐based nanosheets, [ 38 ] allowing a convenient way to increase on‐current by fabricating parallel arrays of nanosheets. It was also shown that contact printed NWs allow to be integrated in parallel arrays as well.…”

Section: Resultsmentioning

confidence: 99%

Reconfigurable Complementary and Combinational Logic Based on Monolithic and Single‐Crystalline Al‐Si Heterostructures

Böckle

Sistani

Bažíková

et al. 2022

Adv Elect Materials

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Modern society is highly depending and relying on electronic computing devices, as for example, employed in efficient servers, personal computers, and mobiles, and currently being explored toward the realization of emerging computing paradigms, such as "artificial intelligence" and the "Internet of Things". [1] A key enabler for these paradigms is the complementary metal-oxide-semiconductor (CMOS) technology, which utilizes the concept of complementary n-and p-type field-effect transistors (FET) to construct Boolean logic gates. Importantly, in CMOS technology the logic functions are fixed by the physical layout of interconnects and the definition of doped regions and thus do not allow for a flexible alteration of the circuits after production. The continuous shrinking of feature sizes of these Si metal-oxide-semiconductor field-effect transistors (MOSFETs) has been providing performance enhancement and higher power efficiency throughout the last decades. However, classical scalability is limited [2] and the static nature of the MOSFET primitives was not developed to provide runtimeadaptability as required for new circuit paradigms. A concept to overcome the static nature in CMOS technology and reduce overall circuit area and power consumption are reconfigurable FETs (RFETs), [3][4][5] encompassing a broad family of devices that enable a reconfiguration of the dominant carrier type based on either Schottky-barrier field-effect transistors (SBFET), [4,[6][7][8][9] or steep slope band-to-band tunneling transistors (TFET), [10][11][12][13] capable of dynamically altering the device operation between n-and p-type. This device concept thus gives rise to a paradigm change where devices, circuits, and even systems are actively and dynamically reconfigured after manufacturing or, as particularly noteworthy, even during run-time, enabling an adaption to the needed logic function of a circuit. Importantly, this "fine-grain" approach is fundamentally different to the already available "coarse-grain" approach followed in field programmable gate arrays (FPGAs) [14] based on signal routing to predefined logic blocks, resulting in high latency in data Metal-semiconductor heterostructures providing geometrically reproducible and abrupt Schottky nanojunctions are highly anticipated for the realization of emerging electronic technologies. This specifically holds for reconfigurable field-effect transistors, capable of dynamically altering the operation mode between n-or p-type even during run-time. Targeting the enhancement of fabrication reproducibility and electrical balancing between operation modes, here a nanoscale Al-Si-Al nanowire heterostructure with single elementary, monocrystalline Al leads and sharp Schottky junctions is implemented. Utilizing a three top-gate architecture, reconfiguration on transistor level is enabled. Having devised symmetric on-currents as well as threshold voltages for n-and p-type operation as a necessary requirement to exploit complementary reconfigurable circuits, selected implementations of log...

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Monolithic and Single-Crystalline Aluminum–Silicon Heterostructures

Cited by 18 publications

References 59 publications

Silicon–Aluminum Phase-Transformation-Induced Superconducting Rings

Silicon–Aluminum Phase-Transformation-Induced Superconducting Rings

Composition Dependent Electrical Transport in Si_1−xGe_xNanosheets with Monolithic Single‐Elementary Al Contacts

Reconfigurable Complementary and Combinational Logic Based on Monolithic and Single‐Crystalline Al‐Si Heterostructures

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Monolithic and Single-Crystalline Aluminum–Silicon Heterostructures

Cited by 18 publications

References 59 publications

Silicon–Aluminum Phase-Transformation-Induced Superconducting Rings

Silicon–Aluminum Phase-Transformation-Induced Superconducting Rings

Composition Dependent Electrical Transport in Si1−xGexNanosheets with Monolithic Single‐Elementary Al Contacts

Reconfigurable Complementary and Combinational Logic Based on Monolithic and Single‐Crystalline Al‐Si Heterostructures

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Product

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Composition Dependent Electrical Transport in Si_1−xGe_xNanosheets with Monolithic Single‐Elementary Al Contacts