2012
DOI: 10.1016/j.mseb.2012.02.029
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MOHOS-type memory performance using HfO2 nanoparticles as charge trapping layer and low temperature annealing

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Cited by 11 publications
(10 citation statements)
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“…It can play a role in the continuous down-scaling of integrated circuits since new insulating materials with a high dielectric constant are being researched to replace SiO2 as a gate dielectric (Wilk et al 2001;Dahal and Chikan 2012;Molina et al 2012a;Molina et al 2012b;Rinkio et al 2009). HfO2 thin layers are highly promising as high-κ dielectric layers in CMOS technology and as dielectric capacitor layers in DRAMs (Wilk et al 2001).…”
Section: Introductionmentioning
confidence: 99%
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“…It can play a role in the continuous down-scaling of integrated circuits since new insulating materials with a high dielectric constant are being researched to replace SiO2 as a gate dielectric (Wilk et al 2001;Dahal and Chikan 2012;Molina et al 2012a;Molina et al 2012b;Rinkio et al 2009). HfO2 thin layers are highly promising as high-κ dielectric layers in CMOS technology and as dielectric capacitor layers in DRAMs (Wilk et al 2001).…”
Section: Introductionmentioning
confidence: 99%
“…Amorphous nanoparticles of HfO2 were used for EUV patterning to develop inorganic photoresists (Trikeriotis et al 2012). Hafnia nanoparticles were embedded in a glass matrix to increase the dielectric constant (Molina et al 2012a;Molina et al 2012b). Recently, hafnium based nanoparticles were grown in situ in GdBa2Cu3O7-δ coated conductors to improve the critical current of the superconductor (Tobita et al 2012).…”
Section: Introductionmentioning
confidence: 99%
“…If present, these deep-trap levels for injected carriers would make more difficult to annihilate the initially trapped electrons within the CTL or to excite these trapped electrons back to the conduction band. The later is also observed when the MOHOS structures are annealed at low temperatures [5]. On the other hand, given that the writing/erasing speed operations are usually flat-band/threshold voltage (Vfb/Vth) shift vs time plots and that they are measured in terms of the applied gate voltage, having thinner oxide stacks (including all blocking/trapping/tunneling oxides) would increase the current density being injected to the trapping layer and thus, a lower operating voltage would be needed to shift Vfb/Vth in any particular direction.…”
Section: Methodsmentioning
confidence: 81%
“…This is very important, since, depending on the type of species forming the conductive filament (Vo + or M + ), any residual left after dissolution of the conductive filament (RESET process) would make the detrapping process from a shallow/deep trap-energy level easier/harder, thus affecting the resistivity windows, endurance, and other reliability issues. Of course, a more precise estimation of the current needed to induce Vo + or M + based formation of conductive filaments would be normalizing g to smaller device areas or, even better, integrating the injected charge with time [18,19] because, due to highly different oxide thicknesses, very different current levels would be required. Nevertheless, the oxide thickness regime in our samples is in concordance with the migration thermodynamics for Vo + /M + , described quite recently [6,7].…”
Section: Resultsmentioning
confidence: 99%