Modeling of nonvolatile floating gate quantum dot memory

Rodriguez

et al. 2011

Self Cite

This paper presents a floating quantum dot (QD) gate nonvolatile memory device using high-energy-gap Zn y Cd 1Ày Se-cladded Zn x Cd 1Àx Se quantum dots (y > x) with tunneling layers comprising nearly lattice-matched semiconductors (e.g., ZnS/ZnMgS) on Si channels. Also presented is the fabrication of an electroluminescent (EL) device with embedded cladded ZnCdSe quantum dots. These ZnCdSe quantum dots were embedded between indium tin oxide (ITO) on glass and a top Schottky metal electrode deposited on a thin CsF barrier. These QDs, which were nucleated in a photo-assisted microwave plasma (PMP) metalorganic chemical vapor deposition (MOCVD) reactor, were grown between the source and drain regions on a p-type silicon substrate of the nonvolatile memory device. The composition of QD cladding, which relates to the value of y in Zn y Cd 1Ày Se, was engineered by the intensity of ultraviolet light, which controlled the incorporation of zinc in ZnCdSe. The QD quality is comparable to those deposited by other methods. Characteristics and modeling of the II-VI quantum dots as well as two diverse types of devices are presented in this paper.

Section: Discussionmentioning

confidence: 99%

“…Hasaneen et al 19 obtained an expression for DV th accounting for the QD charge in uncladded dots. The model of Hasaneen et al was modified by including the ZnCdSe cladding ($1 nm) and ZnMgS as the latticematched insulator.…”

Section: Electrical Characteristics Of Quantum Dot Floating Gate Nonvmentioning

confidence: 99%

Core–Shell Zn x Cd1−x Se/Zn y Cd1−y Se Quantum Dots for Nonvolatile Memory and Electroluminescent Device Applications

Al-Amoody

Rodriguez

et al. 2011

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“…The tunneling transition rate from the channel to the quantum dot layers (P w!d ) is expressed by the Hamiltonian in Eq. (1) following Chuang et al 38,39 …”

Section: Znmgs-zns Layermentioning

confidence: 99%

Three-State Quantum Dot Gate FETs Using ZnS-ZnMgS Lattice-Matched Gate Insulator on Silicon

Karmakar

Jain

2011

This paper presents the three-state behavior of quantum dot gate field-effect transistors (FETs). GeO x -cladded Ge quantum dots (QDs) are site-specifically self-assembled over lattice-matched ZnS-ZnMgS high-j gate insulator layers grown by metalorganic chemical vapor deposition (MOCVD) on silicon substrates. A model of three-state behavior manifested in the transfer characteristics due to the quantum dot gate is also presented. The model is based on the transfer of carriers from the inversion channel to two layers of cladded GeO x -Ge quantum dots.

“…The simulation model was adopted from Heller et al 5,6 This model presented uncladded quantum dots surrounded by a dielectric layer. The simulated band diagram using this model is presented in Fig.…”

Section: Quantum Dot Nonvolatile Memory Modelingmentioning

confidence: 99%

Nonvolatile Silicon Memory Using GeO x -Cladded Ge Quantum Dots Self-Assembled on SiO2 and Lattice-Matched II–VI Tunnel Insulator

Gogna

Chan

et al. 2011

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This paper presents fabrication and characterization of a quantum dot-based floating gate nonvolatile memory device with site-specific self-assembly of germanium oxide-cladded germanium (GeO x -Ge) quantum dots on SiO 2 and ZnS/ZnMgS/ZnS (II-VI lattice-matched high-j dielectric) tunnel insulator material. These monodispersed and individually cladded quantum dots have the potential to store charge uniformly in the floating gate and are well suited for nonvolatile memory applications.