“MFS FET” -A New Type of Nonvolatile Memory Switch Using PLZT Film

Abstract

A step-like change in the interface built-in potential by controlling the ferroelectric polarization has been observed in PLZT thin film sputtered on GaAs single crystal heterostructure junction. We have developed a nonvolatile memory FET by using this MFS (Metal-Ferroelectric-Semiconductor) construction. A typical performance of the GaAs device with a p-channel mode operation is that the writing (“0” to “1” threshold) gate voltage Von=1.5 V, the erasing (“1” to “0”) gate voltage Voff=6.0 V, and the on state drain current Ion=0.1 mA. This operation power level obtained here is about one order of magnitude smaller than that of similar type devices using other ferroelectrics such as Bi4Ti3O12, PZBFN and SbSI. A series of technical data for the fabrication technologies including thin film deposition of the ferroelectric are presented, and the analyses on the device performance are also discussed.

Recent Progress of Ferroelectric-Gate Field-Effect Transistors and Applications to Nonvolatile Logic and FeNAND Flash Memory

“…A variety of FeFETs had been investigated over the past decades [2,3,4,5,6,7,8,9,10]. However, despite much effort by a lot of research groups, data retention time of the FeFETs has been short.…”

Relationship between source/drain-contact structures and switching characteristics in oxide-channel ferroelectric-gate thin-film transistors

“…FeRAMs are classified into two cell types: the capacitor type and the transistor type called the ferroelectric-gate field-effect transistor (FeFET). [6][7][8][9][10][11][12][13] Although the capacitor-type FeRAMs are already implemented in practical use, their reading operation is destructive, which involves rewriting operation with additional power consumption. In contrast, the reading operation of FeFETs is nondestructive and their writing operation can be carried out with low voltage, but not with current.…”

Electric Properties of Pt/PbZr 0.53 Ti 0.47 O 3 /LaAlO 3 /Si Structure

“…In particular, the ferroelectric field effect transistors (FET)-type memory [1][2][3], in which the gate with metal/ferroelectric/semiconductor (MFS) structure is controlled by the spontaneous polarization of ferroelectric materials, is recognized to be promising candidate due to its potential advantages of fast switching, tolerance against radiation, nondestructive readout and high density for nonvolatile memory application. However, the main difficult in realizing these FET-type memory devices is to obtain a reliable ferroelectric/Si interface, because of the interface reaction during fabrication, which results in the carrier injection at the interface, and lower retention, for example, it is well know that Pb(Zr, Ti)O 3 (PZT) can easily react with Si and the interdiffusion of Pb and Si at the PZT/Si interface occurs even at a temperature as low as 500 • C [4,5], hence, to overcome these difficulties, insulating buffer layers such as yttria-stablized zirconia (YSZ) [6], CeO 2 [7,8], MgO [9], and SrTiO 3 [10] films are usually inserted between the ferroelectric layer and silicon substrates to form a metal/ferroelectric/insulator/semiconductor (MFIS) structure, but it was found that these buffer layer have large absorption current due to the high density of crystalline defects or carrier traps existing in the interface of Si and buffer.…”