Methods of Set Switching for Improving the Uniformity of Filament Formation in the TiO[sub 2] Thin Film

Abstract

The parameters determining the set state current and reset voltage, determined by the strength of formed filaments, were examined using current pulse and voltage driven current-voltage ͑I-V͒ sweeps. In the pulse switching measurement, the total current flow, including overshooting noise effect at the moment of set switching, was found to determine the strength of the filament. Displacing the capacitive charge dissipation peak from the overshoot region by a longer pulse rising time was effective in reducing the random variations in the switching parameters. A smaller voltage step in the I-V sweep was effective in reducing the random variation in filament formation.Resistance switching ͑RS͒ phenomena in a variety of thin-film materials have recently attracted considerable attention for applications to the next generation of nonvolatile memory devices. 1-3 The unipolar RS proceeds by applying the same bias polarity and has been understood from the formation and rupture of the percolated conduction channels ͓conducting filaments ͑CFs͔͒ in several binary oxides, e.g., TiO 2 and NiO. 2,3 In the filamentary RS, improvement of the switching uniformity should be accomplished for memory device fabrication. One of the reasons for the nonuniform RS comes from the random nature of filament formation. Filament formation, accompanied by oxygen ion movement in most cases, is a very disordered process. [4][5][6] This results in the fluctuations of various switching parameters, such as the switching voltage and on and off currents. The other reason originated from the distortion of the stimulus signal for initiating RS. In pulse switching, input pulse distortion by the overshoot effect due to a short pulse rising time can cause a nonuniform RS. This article reports a method to overcome the overshoot effect on the set switching by using a current pulse with a longer rising time. In addition, in the voltage sweep switching, which is another common switching method, a smaller voltage step during the set switching reduced the random variation significantly.The preparation of a Pt/60 nm thick TiO 2 /Pt structured sample and a method for the RS of the sample are reported in detail elsewhere. 7,8 A current pulse pattern generator ͑PG, HP/Agilent 81110A͒ with various pulse rising ͑also falling͒ times ͑t r ͒ was used as a current pulse source for the first type of set switching experiments. The transient current at the moment of set switching using the PG was monitored using a digital oscilloscope ͑OSC, Tektronix 684C͒. For this current monitoring, the internal resistance of PG was set to 1 k⍀. The PG was programmed to obtain a peak current of 50 mA at the OSC considering the on-state resistance of the sample ͑ ϳ15 ⍀͒ and the internal resistance of the OSC ͑50 ⍀͒. A schematic diagram for the pulse switching setup is shown in the inset of Fig. 1f. Here, the monitored voltage in OSC ͑V R ͒ was converted into the sample current using the resistance of the OSC. For the second type of set switching experiments, a semiconductor parameter analyze...

Dual Conical Conducting Filament Model in Resistance Switching TiO2 Thin Films

“…In fact, the large fluctuations in the I–V curves for the given memory cell has been one of the big hurdles that the RS memory has to overcome to become a viable memory device. There have been several reports on the possible origins of and solutions to this critical problem 25 26 . The present work can add a meaningful improvement in the understanding of such important topic, which will trigger clever ways of overcoming such problem in the future.…”

Characterization of external resistance effect and performance optimization in unipolar-type SiOx-based resistive switching memory

“…10 Lastly, the external resistance not only possibly increases the RC delay of the RRAM element but also increases the parasitic capacitor effect on the transition switching, potentially limiting the operating speed of the memory device and causing reliability issue. 11,12 To better observe the true operating characteristics, we fabricated SiO x RRAM devices with a Metal-Insulator-Metal (MIM) structure. The metal electrodes allow contact resistance and interconnect resistance to be minimized so that the external series resistance is negligible.…”

Defect-Engineered Electroforming-Free Analog HfOx Memristor and Its Application to the Neural Network

“…In the T-45 device in Figure a, after the EF occurred at ∼2.0 V, the device remained at the LRS during the subsequent sweep to ∼−0.7 V, and the device turned into the HRS after the sweep down to −1.3 V. The comparison between the black curve and the other curves shows a peculiar property of the device immediately after the EF. Despite the I CC being controlled as low as possible, the first LRS showed a relatively higher conductance state than the subsequent LRSs, which originates from the capacitive charge effect. , Such excess EF behavior should be avoided to achieve longer retention and higher endurance, because it generates excess filaments, causing higher variation of the RS and faster device degradation. As the EF voltage is proportional to the film thickness, one of the most feasible methods to do this is to decrease the HfO 2 thickness .…”

“…Here, the R-45 and T-45 devices showed lower R LRS with a higher variation than those of the R-30 device, although their HfO 2 film was thicker. Such variation was caused by “over-forming” during the EF process. , Once the ReRAM cell is over-formed, the stochasticity of the RS increases, which causes a higher variation in the device uniformity. Figure e shows the average resistance values of LRSs and HRSs over 100 cycles from one typical cell.…”

“…Despite the I CC being controlled as low as possible, the first LRS showed a relatively higher conductance state than the subsequent LRSs, which originates from the capacitive charge effect. 50,51 Such excess EF behavior should be avoided to achieve longer retention and higher endurance, because it generates excess filaments, causing higher variation of the RS and faster device degradation. As the EF voltage is proportional to the film thickness, one of the most feasible methods to do this is to decrease the HfO 2 thickness.…”