Metallized Porous GaP Templates for Electronic and Photonic Applications

Tiginyanu, I. M.; Monaico, Eduard; Sergentu, V. V.; Tiron, A.V.; Ursaki, V. V.

doi:10.1149/2.0011503jss

Cited by 30 publications

(16 citation statements)

References 29 publications

(31 reference statements)

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“…Indeed, using Pt electroplating in porous templates of n-InP and n-GaP, recently we demonstrated the possibility to fabricate ordered arrays of smooth-wall Pt nanotubes embedded in semiconductor matrices. 8,9 The Pt/GaP interpenetrating networks were used to fabricate a high performance variable capacitance device. 8…”

Section: Resultsmentioning

confidence: 99%

Self-Assembled Monolayer of Au Nanodots Deposited on Porous Semiconductor Structures

Tiginyanu

Monaico

Nielsch³

2015

ECS Electrochemistry Letters

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We demonstrate the possibility to cover the surface of GaP and InP porous structures by a self-assembled monolayer of electrochemically deposited nanoscale Au nanodots. After nucleation, each dot was found to increase in sizes up to a critical transverse dimension, the process of pulsed electrodeposition of gold being continuously supported by the formation of new nanodots. The density of deposited Au dots is shown to be dependent upon the number and width of the applied voltage pulses. The deposition of "size-saturated" dots continues until the entire surface exposed to the electrolyte is covered by a monolayer of self-assembled Au nanodots.Deposition of metal nanoparticles on semiconductor substrates and matrices is of great importance for controlled growth of semiconductor nanostructures, enhancement of solar energy absorption in thin-film photovoltaic structures, fabrication of plasmonic nanoarchitectures for surface enhanced spectroscopy etc. 1-3 Among many explored methods such as vapor, solution, electrochemistry-based approaches, the electrochemical deposition of metal dots proves to be one of the most cost-effective and efficient, especially when the dots are to be created on semiconductor substrates or matrices exhibiting electrical conductivity. Using pulsed electroplating, Sato et al. demonstrated uniform deposition of Pt dots with the diameters ranging from 20 to 30 nm on n-GaAs and n-InP substrates with the free electron concentrations of 2 × 10 16 and 5 × 10 16 cm −3 respectively. 4,5 The authors found the Fermi-level pinning at the metal-semiconductor interface to be greatly reduced, resulting in a strong dependency of the Schottky barrier height on the metal workfunction.The goal of this paper is to demonstrate, in premiere, electrochemical deposition of size-saturated noble metal dots on GaP and InP porous semiconductor structures. We show the possibility to reach full coverage of the surface of porous structures by a self-assembled monolayer of nanoscale Au dots. The gold dots were chosen in our research due to their unique plasmonic characteristics promising for a myriad of applications. ExperimentalCrystalline 500-μm thick n-GaP(111) and n-InP(100) substrates with the free electron concentration of 2 × 10 17 and 1.3 × 10 18 cm −3 respectively were supplied by CrysTec GmbH, Germany. To fabricate porous layers, the GaP and InP substrates were subjected to anodic etching in 500 ml of 1 M HBr and 5% HCl aqueous solution, respectively, at 25 • C through photolithographically prepared windows, as described elsewhere. 6 Electroplating of Au was realized in a commercially available gold bath containing 5 g/l Au (DODUCO). The electrochemical deposition of Au was performed at T = 25 • C in a common two-electrode plating cell where the porous sample served as working electrode, while a platinum wire was used as counter electrode. A pulsed voltage with rectangular pulses was provided by a home-made generator. During the pulse time with duration from 2 to 100 μs a cathodic voltage of −16 and −25 V for InP...

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Section: Resultsmentioning

confidence: 99%

Self-Assembled Monolayer of Au Nanodots Deposited on Porous Semiconductor Structures

Tiginyanu

Monaico

Nielsch³

2015

ECS Electrochemistry Letters

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“…However, the properties and the application of nanostructures depend on a method of synthesis [12,13]. There are several chemical [14,15] and physical methods that have been successfully employed for fabricating the nanostructures of various materials [16].…”

Section: усовершенствован способ формирования пористого арсенида галлmentioning

confidence: 99%

Research into effect of electrochemical etching conditions on the morphology of porous gallium arsenide

Vambol

Богданов

Vambol

et al. 2017

EEJET

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“…This is predetermined by the ease and affordability of the method. Porous layers at the surface of silicon [9,10], germanium [11], gallium arsenide [12,13], gallium phosphide [14], indium phosphide [15,16], etc, were formed by the method of electrochemical etching.…”

Section: Literature Review and Problem Statementmentioning

confidence: 99%