Metal-induced laterally crystallized polycrystalline silicon: technology, material, and devices

Wong, Man

doi:10.1117/12.389410

Cited by 3 publications

(5 citation statements)

References 8 publications

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“…Compared with the conventional SPC TFT with thick SiO 2 gate dielectric, we can observe that the conventional MILC-TFT with thick SiO 2 gate dielectric shows a significant improvement on µ FE , as shown in Table I. It is due to the fact that the MILC channel film has low defect density in poly-Si [21]. However, the S.S. of conventional MILC-TFT is still too high to reduce the operation voltage of LTPS-TFT [17]- [21].…”

Section: Methodsmentioning

confidence: 67%

“…It is due to the fact that the MILC channel film has low defect density in poly-Si [21]. However, the S.S. of conventional MILC-TFT is still too high to reduce the operation voltage of LTPS-TFT [17]- [21]. The replacement of thick SiO 2 gate dielectrics by high-κ gate dielectrics can provide a large gatecapacitance density to attract more carriers with a smaller gate voltage to fill up the traps and lower the potential barrier height in the poly-Si channel film [22].…”

Section: Methodsmentioning

confidence: 98%

“…1(a). Lee et al and Wong et al have shown that a very thin thickness of Ni within 5 nm is enough for MILC process [17]- [21]. Then, the 50-nm α-Si layer was recrystallized by the MILC process at 550 • C for 24 h in a N 2 ambient, as shown in Fig.…”

Section: Methodsmentioning

confidence: 99%

“…However, ELC suffers from high initial cost and high process complexity. Metal-induced lateral-crystallization (MILC) method is another batch process with low cost to achieve high µ FE of LTPS-TFTs due to its large grain size and longitudinal grain boundaries [17]- [21].…”

Section: Introductionmentioning

confidence: 99%

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High-Performance Metal-Induced Laterally Crystallized Polycrystalline Silicon P-Channel Thin-Film Transistor With $\hbox{TaN/HfO}_{2}$ Gate Stack Structure

Chao

et al. 2008

IEEE Electron Device Lett.

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In this letter, high-performance low-temperature poly-Si p-channel thin-film transistor with metal-induced lateralcrystallization (MILC) channel layer and TaN/HfO 2 gate stack is demonstrated for the first time. The devices of low threshold voltage V TH ∼ 0.095 V, excellent subthreshold swing S.S. ∼ 83 mV/dec., and high field-effect mobility µ FE ∼ 240 cm 2 /V · s are achieved without any defect passivation methods. These significant improvements are due to the MILC channel film and the very high gate-capacitance density provided by HfO 2 gate dielectric with the effective oxide thickness of 5.12 nm. Index Terms-High-κ, low-temperature poly-Si thin-film transistor (LTPS-TFT), metal gate, metal-induced lateral crystallization (MILC).

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Section: Methodsmentioning

confidence: 67%

Section: Methodsmentioning

confidence: 98%

Section: Methodsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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High-Performance Metal-Induced Laterally Crystallized Polycrystalline Silicon P-Channel Thin-Film Transistor With $\hbox{TaN/HfO}_{2}$ Gate Stack Structure

Chao

et al. 2008

IEEE Electron Device Lett.

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“…The first of them consists in modification of the Schottky barrier formation process proposed in [27] which enables production of poly-Si/Ni polycide Schottky diodes with rectification ratios as high as 10 6 . The other possibility is to replace poly-Si by α -Si:H and to apply the metal-induced crystallization to form diodes nearly as perfect as those produced on the basis of single-crystalline Si [8,28-30]. Each of these alternatives in principle could enable the development of high-performance monolithic Schottky diode microbolometer IR FPAs.…”

Section: Resultsmentioning

confidence: 99%

Metal silicide/poly-Si Schottky diodes for uncooled microbolometers

et al. 2013

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Nickel silicide Schottky diodes formed on polycrystalline Si 〈P〉 films are proposed as temperature sensors of monolithic uncooled microbolometer infrared focal plane arrays. The structure and composition of nickel silicide/polycrystalline silicon films synthesized in a low-temperature process are examined by means of transmission electron microscopy. The Ni silicide is identified as a multi-phase compound composed of 20% to 40% of Ni3Si, 30% to 60% of Ni2Si, and 10% to 30% of NiSi with probable minor content of NiSi2 at the silicide/poly-Si interface. Rectification ratios of the Schottky diodes vary from about 100 to about 20 for the temperature increasing from 22â„ƒ to 70â„ƒ; they exceed 1,000 at 80 K. A barrier of around 0.95 eV is found to control the photovoltage spectra at room temperature. A set of barriers is observed in photo-electromotive force spectra at 80 K and attributed to the Ni silicide/poly-Si interface. Absolute values of temperature coefficients of voltage and current are found to vary from 0.3%â„ƒ to 0.6%/â„ƒ for forward bias and around 2.5%/â„ƒ for reverse bias of the diodes.

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High-Performance Poly-Si TFTs of Top-Gate with High-κ Metal-Gate Combine the Laser Annealed Channel and Glass Substrate

Lu¹,

Chien²,

Kuo³

et al. 2011

Electrochem. Solid-State Lett.

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We demonstrate high-performance low-temperature poly-Si thin film transistors ͑LTPS-TFTs͒ with a TaN/Hf-based top-gate-stack and combine the channel film by laser annealing and glass substrate ͑glass substrate high-metal-gate thin film transistor, called GSHM-TFTs͒. The GSHM-TFTs of n-channel ͑called GSHM-NTFTs͒ exhibit a very low threshold voltage, low supply voltage ͑ ϳ 2 V͒, steep subthreshold swing ͑S.S.͒ ϳ95 mV/dec, and high I ON /I OFF ratio Ͼ10 7 . In contrast, GSHM-TFTs of p-channel ͑called GSHM-PTFTs͒ exhibit an S.S. ϳ154 mV/dec and an I ON /I OFF ratio even higher than 10 8 . Furthermore, the driving currents are also enhanced in GSHM-TFTs. These significant improvements are due to the combination of laser annealed channel film and the very high gate-capacitance density provided by HfO 2 gate dielectrics with the effective oxide thickness of 14 nm.High-performance low-temperature poly-Si thin film transistors ͑LTPS-TFTs͒ have been developed recently for the employment of active-matrix liquid crystal displays on a glass substrate. Additionally, they drive integrated circuits for the application of system-onpanel ͑SOP͒ and three-dimensional ͑3D͒ circuit integration elements such as static random access memories and dynamic random access memories. 1-3 High-speed display driving circuits require thin film transistors ͑TFTs͒ to operate at low voltages and high driving currents, with a low threshold voltage. However, poly-Si channel film has many grain boundaries, which degrade the subthreshold swing ͑S.S.͒, threshold voltage V TH , and field-effect mobility FE , resulting in a large operating voltage. 4,5 Though reducing the gate oxide thickness can increase the drive current of TFTs, it results in a higher gate leakage current.In order to preserve the physical dielectric thickness while increasing the gate-capacitance, new high-materials, including Pr 2 O 3 , Ta 2 O 5 , HfSiO x , and HfO 2 , have been proposed. [6][7][8][9][10][11] Recently, low-temperature polycrystalline silicon-on-glass has been seen as a promising candidate for large-area electronics and system-on-glass because of its high field-effect mobility compared to amorphous silicon. To suppress the undesirable performance caused by the grain boundary, the transfer of single-crystalline Si layers on glass has been reported. 12-14 Though a high electron field-effect mobility can be achieved ͑ ϳ 430 cm 2 /V s͒, the manufacturing cost is high and the process is complex since a layer transfer technique is involved in the fabrication.In this work, we demonstrate LTPS-TFT with a TaN gate and a HfO 2 gate dielectric and combine a laser annealed poly-Si channel film and glass substrate ͑GSHM-TFTs͒ for the n channel and p channel. The top-gate process is very compatible to metal-oxidesemiconductor field-effect transistor ͑MOSFET͒. This highperformance GSHM-TFTs of very low supply voltage, excellent S.S., and high FE with n-channel TFTs ͑NTFTs͒ and p-channel TFTs ͑PTFTs͒ can be obtained, all of which are promising for realization of SOP and 3D circuit int...

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Metal-induced laterally crystallized polycrystalline silicon: technology, material, and devices

Cited by 3 publications

References 8 publications

High-Performance Metal-Induced Laterally Crystallized Polycrystalline Silicon P-Channel Thin-Film Transistor With $\hbox{TaN/HfO}_{2}$ Gate Stack Structure

High-Performance Metal-Induced Laterally Crystallized Polycrystalline Silicon P-Channel Thin-Film Transistor With $\hbox{TaN/HfO}_{2}$ Gate Stack Structure

Metal silicide/poly-Si Schottky diodes for uncooled microbolometers

High-Performance Poly-Si TFTs of Top-Gate with High-κ Metal-Gate Combine the Laser Annealed Channel and Glass Substrate

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