MemSens: Memristor-Based Radiation Sensor

Abunahla, Heba; Mohammad, Baker; Mahmoud, Lama; Darweesh, Muna; Alhawari, Mohammad; Jaoudé, Maguy Abi; Hitt, G. W.

doi:10.1109/jsen.2018.2808285

Cited by 43 publications

(22 citation statements)

References 28 publications

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“…As Internet of Things (IoT) sensors become more popular in human life and environment, an amount of data generated from the sensors becomes enormous [28,29,30]. To handle this huge amount of data from the physical world, we can think of the integration of IoT sensors and memristor-CMOS hybrid circuit into one chip [31,32]. By doing so, the unstructured data from the sensors can be pre-processed and interpreted near the sensors by the integrated memristor-CMOS hybrid circuit of HTM hardware.…”

Section: Discussionmentioning

confidence: 99%

Hybrid Circuit of Memristor and Complementary Metal-Oxide-Semiconductor for Defect-Tolerant Spatial Pooling with Boost-Factor Adjustment

Nguyen

Pham

2019

Materials

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Hierarchical Temporal Memory (HTM) has been known as a software framework to model the brain’s neocortical operation. However, mimicking the brain’s neocortical operation by not software but hardware is more desirable, because the hardware can not only describe the neocortical operation, but can also employ the brain’s architectural advantages. To develop a hybrid circuit of memristor and Complementary Metal-Oxide-Semiconductor (CMOS) for realizing HTM’s spatial pooler (SP) by hardware, memristor defects such as stuck-at-faults and variations should be considered. For solving the defect problem, we first show that the boost-factor adjustment can make HTM’s SP defect-tolerant, because the false activation of defective columns are suppressed. Second, we propose a memristor-CMOS hybrid circuit with the boost-factor adjustment to realize this defect-tolerant SP by hardware. The proposed circuit does not rely on the conventional defect-aware mapping scheme, which cannot avoid the false activation of defective columns. For the Modified subset of National Institute of Standards and Technology (MNIST) vectors, the boost-factor adjusted crossbar with defects = 10% shows a rate loss of only ~0.6%, compared to the ideal crossbar with defects = 0%. On the contrary, the defect-aware mapping without the boost-factor adjustment demonstrates a significant rate loss of ~21.0%. The energy overhead of the boost-factor adjustment is only ~0.05% of the programming energy of memristor synapse crossbar.

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Section: Discussionmentioning

confidence: 99%

Hybrid Circuit of Memristor and Complementary Metal-Oxide-Semiconductor for Defect-Tolerant Spatial Pooling with Boost-Factor Adjustment

Nguyen

Pham

2019

Materials

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“…In addition, the early-stage processes such as nucleation, crystal growth, and aggregation (Teychené et al, 2020 ) may play a crucial role in the sol–gel synthesis of TiO 2 nanoparticles (Cheng et al, 2017 ). The memristive devices fabricated using the sol–gel method have various areas of application and operate at a threshold voltage ranging from ~0.5 V (Abunahla et al, 2018 ) to 1.5 V (Vilmi et al, 2016 ; Hu et al, 2020 ) or higher (Illarionov et al, 2019 ) with a resistive switching ratio R OFF / R ON of 10 1 -10 5 ( Table 1 ). Thus, the functional parameters of these devices may be variable with respect to the morphology and purity of the sol–gel product, deposition method (see section Fabrication), and annealing conditions (see section Annealing and Electric Properties).…”

Section: Synthesis and Fabricationmentioning

confidence: 99%

“…Functional layers are formed by depositing drops of colloidal dispersions of TiO 2 onto a substrate using a syringe or pipette. The thickness of the TiO 2 layers obtained by this method typically ranges between 40 and 200 μm (Gale et al, 2014 ; Abunahla et al, 2018 ; De Carvalho et al, 2019 ). This thickness range does not match the usual topological features of RRAM memristors, although the method has recently been justified for various memristive sensors (Abunahla et al, 2016 , 2018 ; Sahu and Jammalamadaka, 2019 ).…”

Section: Synthesis and Fabricationmentioning

confidence: 99%

Memristive TiO2: Synthesis, Technologies, and Applications

et al. 2020

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Titanium dioxide (TiO 2 ) is one of the most widely used materials in resistive switching applications, including random-access memory, neuromorphic computing, biohybrid interfaces, and sensors. Most of these applications are still at an early stage of development and have technological challenges and a lack of fundamental comprehension. Furthermore, the functional memristive properties of TiO 2 thin films are heavily dependent on their processing methods, including the synthesis, fabrication, and post-fabrication treatment. Here, we outline and summarize the key milestone achievements, recent advances, and challenges related to the synthesis, technology, and applications of memristive TiO 2 . Following a brief introduction, we provide an overview of the major areas of application of TiO 2 -based memristive devices and discuss their synthesis, fabrication, and post-fabrication processing, as well as their functional properties.

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“…Besides using MRs in two-level memories, MRs can also store multiple bits in a single memory cell to form the multi-level cell (MLC), which leads to dense and power-efficient memories [17][18][19]. Moreover, some MR devices exhibit the ability to change their fingerprint currentvoltage (I-V) characteristic against specific environmental changes, which allows their deployment in sensing applications [20][21][22][23].…”

Section: Introductionmentioning

confidence: 99%

On‐chip tunable Memristor‐based flash‐ADC converter for artificial intelligence applications

Humood

Mohammad

Abunahla

et al. 2020

IET Circuits, Devices & Systems

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This study presents a novel hybrid memristor (MR)-complementary metal-oxide-semiconductor-based flash analogue-to-digital converter (ADC). The speed and efficiency of the ADC are important aspects that can significantly affect the overall system performance. The flash ADC is considered the fastest type of ADCs; however, its performance is affected by the resistor mismatch. The proposed flash ADC is the first to use tunable MR to replace conventional resistor to generate accurate reference voltages. This is achieved by utilising the highly analogue behaviour observed in multi-state MR devices fabricated and tested by the authors' group. The electrical parameters of the devices have been extracted by device characterisation, then the voltage-threshold adaptive model (VTEAM) has been used to develop a correlated mathematical and Simulation Program with Integrated Circuit Emphasis (SPICE) device model. The proposed MR-based flash-ADC design solves the issue of resistor mismatch that results in encoding errors by the ability to tune the MR resistance value post-processing. Moreover, being a nanoscale component, the usage of MR significantly improves the area efficiency of the target ADC. Furthermore, the proposed design has improved the ADC transfer function characteristic and has lower differential non-linearity and integral non-linearity errors compared with the conventional design.

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MemSens: Memristor-Based Radiation Sensor

Cited by 43 publications

References 28 publications

Hybrid Circuit of Memristor and Complementary Metal-Oxide-Semiconductor for Defect-Tolerant Spatial Pooling with Boost-Factor Adjustment

Hybrid Circuit of Memristor and Complementary Metal-Oxide-Semiconductor for Defect-Tolerant Spatial Pooling with Boost-Factor Adjustment

Memristive TiO2: Synthesis, Technologies, and Applications

On‐chip tunable Memristor‐based flash‐ADC converter for artificial intelligence applications

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