Memristor crossbar arrays with 6-nm half-pitch and 2-nm critical dimension

Self Cite

in computing accelerators compared to high density storage-class memory, it is frequently important in computing applications to program multiple bits of information within every device by achieving many distinct conductance levels, while keeping the operating currents lower especially at the high conductance states. Operating in lower conductances is not only needed to reduce overall power consumption but also essential to improve the computing accuracy. For example, in analog matrix-vector multiplication, voltage drops across metal interconnect lines cause computational errors and, therefore, the memristor array size must be limited. [6,17,[20][21][22] Achieving lower memristor conductances lowers the voltage drop on the interconnect wires, allowing lower computing current and larger array sizes. This further benefits the energy and area efficiency by amortizing the costs of anolog to digital converters (ADC) required in the circuit. [4] However, existing demonstrations have a narrow dynamic range and achieving multiple low conductance levels is challenging. A larger ratio between the high and low conductances (on/off ratio) helps in achieving more distinct programmable low conductance levels. In addition, memristors are required to be integrated with CMOS circuits in many such applications. For instance, a 1-transistor-1-memristor (1T1M) combination provides in situ current compliance through gate voltage modulation so that the memristor can be programmed in an analog manner. [12,16,25] This brings another challenge: compatibility of memristor and CMOS. This includes not only material and fabrication compatibility, but also CMOS performance meeting the memristor operating requirements as both continue size scaling. Thus, it is essential to demonstrate all the aforementioned properties in nanometer-scale memristors repeatedly and reproducibly.Among various forms of memristors, oxide memristors outperform others by possessing the advantages of lower programming and computing energy, favorable scaling in cell size, [10,11,30] and CMOS-compatibility in materials and fabrication. Recently, many reports demonstrated enouraging results using multiple-bits in HfO x , TaO x , and other oxide memristors for neuromorphic computing applications, [23][24][25]31,32] making these highly promising if CMOS-integrated nanoscale devices can be demonstrated wtih wide dynamic range and promising yield numbers.Using memristors, such as oxide and phase change resistive switches, as tunable resistors to construct analog computing hardware accelerators is gaining keen attention. Such accelerators have demonstrated the potential to significantly outperform digital computers in highly relevant applications such as machine learning and image processing. However, improvements in device-level performance of memristors, including reducing power consumption and high current-induced metal migration in interconnects, need continued developments. Nanoscaling and complementary metal-oxide semiconductor (CMOS) integration are also of significant ...

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confidence: 99%

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confidence: 99%

Low‐Conductance and Multilevel CMOS‐Integrated Nanoscale Oxide Memristors

Sheng

Graves

Kumar

et al. 2019

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“…[6] Despite various switching mechanisms have been proposed and solidly confirmed, [7,8] of particular interest and importance is the ion migration-based filamentary mechanism that can ensure an enhanced performance as the device scaling down (Figure 1c). Excellent device miniaturization of <10 nm, [9,10] ultrafast operation speed of <1 ns, [11,12] and extreme switching endurance of >10 12 cycles [13] have been demonstrated in memristors with filamentary mechanism, in addition to their abundant storage media including oxides, nitrides, chalcogenides, polymers, and etc. [7,8] Room-temperature quantum conductance has also been found in these memristors when the size of conducting filaments is reduced down to atomic scale, [14][15][16] as schematically shown by the panels (ii) and (iii) in Figure 1c.…”

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confidence: 99%

Recent Advances of Quantum Conductance in Memristors

Xue

Gao

Shang

et al. 2019

based on a resistive switching Pt/TiO 2−x / TiO 2 /Pt device (Figure 1b), since when the long-standing resistive switching devices over the past half century were all regarded as memristors [3] and aroused ever increasing research interest all over the world for promising nonvolatile memory, logic-in-memory as well as neuromorphic computing applications. [4][5][6][7][8] Memristors usually consist of a simple "metal/insulator/metal" sandwich structure and can be reversibly switched between a high resistance state (HRS, or off state) and a low resistance state (LRS, or on state) under external electrical stimuli. [6] Despite various switching mechanisms have been proposed and solidly confirmed, [7,8] of particular interest and importance is the ion migration-based filamentary mechanism that can ensure an enhanced performance as the device scaling down (Figure 1c). Excellent device miniaturization of <10 nm, [9,10] ultrafast operation speed of <1 ns, [11,12] and extreme switching endurance of >10 12 cycles [13] have been demonstrated in memristors with filamentary mechanism, in addition to their abundant storage media including oxides, nitrides, chalcogenides, polymers, and etc. [7,8] Room-temperature quantum conductance has also been found in these memristors when the size of conducting filaments is reduced down to atomic scale, [14][15][16] as schematically shown by the panels (ii) and (iii) in Figure 1c. In this scenario, the device conductance G is able to be expressed as

“…[114] Theoretically, the cross-sectional area of filaments partially accounts for the minimum area of devices, as filaments laterally expand during penetrating through the active layer of memristive devices. Integration density is determined by lateral size of memristive devices.…”

Section: Integrationmentioning

confidence: 99%

2D Layered Materials for Memristive and Neuromorphic Applications

Wang

Meng

et al. 2019

demonstrated that the memristive devices exhibit many promising features, [3][4][5][6][7][8] such as non-volatility, high speed switching, high endurance, high-density integration, CMOS-compatible fabrication, and so on. These features make them ideal candidates for applications in memory devices, [3,5,9] in-memory computing, [3,[10][11][12] and edge computing. [13,14] The working principle of the TMOs-based memristive devices relies on ion drift or diffusion, which resembles motion of ions in the biological neurons and synapses. The ionic motions exhibit dynamic behaviors. Thus, the memristive devices can be used to emulate the synaptic plasticity [15] and neurons. [16][17][18] Compared to traditional silicon synapses [19][20][21] and neurons [22,23] requiring complex circuits, such emerging memristive devices have compact structures and enhanced func-