Memristor-Based Neuromorphic Hardware Improvement for Privacy-Preserving ANN

Fu, Jingyan; Liao, Zhiheng; Wang, Jinhui

doi:10.1109/tvlsi.2019.2923722

Cited by 18 publications

(9 citation statements)

References 29 publications

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“…In a LTP process, for a scenario where the conductance of a memristor is required to be increased from a to b, the ideal linear function is usually used to calculate the needed pulse stimuli. 198 Yet, upon application of the calculated pulses to the actual memristor, the conductance deviates from its expected trajectory and shifts from point a to c instead of from point a to b. A comparable error in weight updating happens during the LTD process.…”

Section: Linearitymentioning

confidence: 98%

“…11a with an inset image of a memristive crossbar. 198 It is preferable to tune the memristor in a linear and symmetric manner, ensuring that every electrical stimulus (e.g., pulse count or width) elicits an equal update of conductance during both potentiation (SET) and depression (RESET) transitions. 199 However, in reality, the LTP and LTD processes are plagued by non-linearity and asymmetry issues from the conductance modulation.…”

Section: Linearitymentioning

confidence: 99%

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Enhancing memristor fundamentals through instrumental characterization and understanding reliability issues

et al. 2023

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Section: Linearitymentioning

confidence: 98%

Section: Linearitymentioning

confidence: 99%

Enhancing memristor fundamentals through instrumental characterization and understanding reliability issues

et al. 2023

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“…Memristor-based ANNs can have applications in user security and privacy. Fu et al [114] performed research on noise injection in the memristor-based ANNs. The authors proposed a linear optimization strategy which updates the memristor conductances analogous to the weights in memristorbased ANNs.…”

Section: Memristor-based Ann For Data Analysismentioning

confidence: 99%

“…ANN for data analysis [114] Cross bar array architecture [106] Crossbar array [109] Memristive circuits [117] Traditional TCAM use of memristors for neural networks in reference to the related research. We present a detailed analysis on memristor-based neuromorphic computing.…”

Section: Novel Network Functionsmentioning

confidence: 99%

On Memristors for Enabling Energy Efficient and Enhanced Cognitive Network Functions

Saleh

Koldehofe

2022

IEEE Access

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The high performance requirements of nowadays computer networks are limiting their ability to support important requirements of the future. Two important properties essential in assuring cost-efficient computer networks and supporting new challenging network scenarios are operating energy efficient and supporting cognitive computational models. These requirements are hard to fulfill without challenging the current architecture behind network packet processing elements such as routers and switches. Notably, these are currently dominated by the use of traditional transistor-based components. In this article, we contribute with an in-depth analysis of alternative architectural design decisions to improve the energy footprint and computational capabilities of future network packet processors by shifting from transistor-based components to a novel component named Memristor. A memristor is a computational component characterized by non-volatile operations on a physical state, mostly represented in form of (electrical) resistance. Its state can be read or altered by input signals, e.g. electrical pulses, where the future state always depends on the past state. Unlike in traditional von Neumann architectures, the principles behind memristors impose that memory operations and computations are inherently colocated. In combination with the non-volatility, this allows to build memristors at nanoscale size and significantly reduce the energy consumption. At the same time, memristors appear to be highly suitable to model cognitive functionality due to the state dependence transitions in the memristor. In cognitive architectures, our survey contributes to the study of memristorbased Ternary Content Addressable Memory (TCAM) used for storage of cognitive rules inside packet processors. Moreover, we analyze the memristor-based novel cognitive computational architectures built upon self-learning capabilities by harnessing from non-volatility and state-based response of memristors (including reconfigurable architectures, reservoir computation architectures, neural network architectures and neuromorphic computing architectures).

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“…Memristors are theoretically postulated by Chua in 1971 9 and later are physically fabricated by the Hewlett-Packard in 2008 10 . The memristor-based crossbar arrays with storage and computing capability show great potential in the neural-network and machine learning applications [10][11][12][13][14][15] . They are characterized with low computational complexity 16 , low power consumption 17 , fast switching speed 18 , high endurance 19 , excellent scalability 20 , and CMOS-compatibility 21 , which are specially appropriate for edge computing in IoT.…”

Section: Introductionmentioning

confidence: 99%

Level Scaling and Pulse Regulating Methods to Mitigate Cycle-to-cycle Variation in Memristor Based Learning System

Liao¹,

Fu²,

Wang³

2020

Preprint

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As a novel non-volatile device, the memristive crossbar array has already delivered many of its promises including low computation complexity, high energy efficiency, and high density for the neuromorphic computing. However, the intrinsic variability of switching behavior has been a major obstacle to their implementation. Here we report a model that experimentally demonstrates the natural stochasticity of cycle-to-cycle variations and quantifies it. In addition, we propose level scaling and pulse regulating methods to mitigate the adverse impact of cycle-to-cycle variations. The relationship of the level of conductance and cycle-to-cycle variation is studied, and experiment results show an optimal number of the levels to mitigate cycle-to-cycle variations in the system. Additionally, the system compresses the number of pulses when the conductance is updated by the pulse stimulus to reduce cycle-to-cycle variations, resulting in the great energy and latency reduction. This work paves the way for the adoption of memristors for more efficient applications for the era of the edge computing and Internet of Things (IoT).

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Memristor-Based Neuromorphic Hardware Improvement for Privacy-Preserving ANN

Cited by 18 publications

References 29 publications

Enhancing memristor fundamentals through instrumental characterization and understanding reliability issues

Enhancing memristor fundamentals through instrumental characterization and understanding reliability issues

On Memristors for Enabling Energy Efficient and Enhanced Cognitive Network Functions

Level Scaling and Pulse Regulating Methods to Mitigate Cycle-to-cycle Variation in Memristor Based Learning System

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