Memory Size Reduction Technique of SDF IFFT Architecture for OFDM-Based Applications

Cho

IEICE Electron. Express

et al. 2013

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In this paper, we propose a new memory efficient IFFT design method for OFDM-based applications, based on a signed integer mapping of three IFFT input signals which are composed of modulated data, pilot and null signals. The proposed method focuses on reducing the word size of memory in the first two stages of the single-path delay feedback (SDF) IFFT architectures since the first two stages require 75% of the overall memory. By Synopsys simulation of the first two stages of IFFT, it is shown that the proposed method achieves about 40% reduction in area and 44% reduction in power consumption compared with the previous work.

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Section: Ifft Input Data Mappingmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Memory efficient IFFT design for OFDM-based applications

Cho

IEICE Electron. Express

et al. 2013

Self Cite

show abstract

“…In [4], to reduce the memory size of IFFT for OFDM systems, the combined integer mapping which generates mapped data and pilot/null signals was proposed. In [5], a signed integer mapping with a simple postprocessing was proposed to further reduce the memory size of IFFT.…”

Section: Introductionmentioning

confidence: 99%

“…In [5], a signed integer mapping with a simple postprocessing was proposed to further reduce the memory size of IFFT. However, the approaches in [4,5] cannot be used to reduce the memory size in the bit-reversal part.…”

Section: Introductionmentioning

confidence: 99%

Memory efficient DIT-based SDF IFFT for OFDM systems

Lee

IEICE Electron. Express

et al. 2014

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This paper presents a new memory reduction method of IFFT for OFDM systems, based on a mapping of three IFFT input signals which consist of modulated data, pilot and null signals. The proposed method focuses on reducing the memory size in the bitreversal part which requires the largest number of memory cells in IFFT architectures. To reduce the memory size, we propose a decimation-in-time (DIT) twiddle factor shifting algorithm to remove the multiplications in the first two stages. It is shown that the proposed method achieves a memory reduction of about 30% compared to previous methods.

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Efficient IFFT architecture design for OFDM applications

2012 International SoC Design Conference (ISOCC)

et al. 2012