Mechanism of Threshold Voltage Shift in ${p}$ -GaN Gate AlGaN/GaN Transistors

Tang, Xi; Li, Baikui; Moghadam, Hamid Amini; Tanner, Philip; Han, Jisheng; Dimitrijev, Sima

doi:10.1109/led.2018.2847669

Cited by 110 publications

(51 citation statements)

References 31 publications

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“…This was mainly because of hole/electron injection into the p-GaN region after high positive gate stress and the carriers being trapped in the p-GaN region. 25 The trapped carriers resulted in a change in the measured capacitance, especially in the low-frequency measurement where the trapping/detrapping time constant was long. At measurement frequencies less than 10 kHz, the effect from high positive gate stress was significant and exhibited an increase of more than 20%.…”

Section: Resultsmentioning

confidence: 99%

“…Several published studies have investigated the device characteristics of p-GaN gate AlGaN/GaN HEMTs, including their threshold voltage shift, leakage current, and degradation mechanisms. 21,[24][25][26][27][28][29][30][31][32][33] However, prior research focused on the device I-V characteristics. The present study investigated the gate capacitance and device offstate characteristics of E-mode p-GaN gate HEMTs with Schottky gate metallization after gate stress for the first time.…”

Section: Introductionmentioning

confidence: 99%

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Gate Capacitance and Off-State Characteristics of E-Mode p-GaN Gate AlGaN/GaN High-Electron-Mobility Transistors After Gate Stress Bias

Lai

Zhong

Tsai

et al. 2021

Journal of Elec Materi

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This study investigated the gate capacitance and off-state characteristics of 650-V enhancement-mode p-GaN gate AlGaN/GaN high-electron-mobility transistors after various degrees of gate stress bias. A significant change was observed in the on-state capacitance when the gate stress bias was greater than 6 V. The corresponding threshold voltage exhibited a positive shift at low gate stress and a negative shift when the gate stress was greater than 6 V, which agreed with the shift observation from the I–V measurement. Moreover, the off-state leakage current increased significantly after the gate stress exceeded 6 V during the off-state characterization although the devices could be biased up to 1000 V without breakdown. The increase in the off-state leakage current would lead to higher power loss.

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Section: Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Gate Capacitance and Off-State Characteristics of E-Mode p-GaN Gate AlGaN/GaN High-Electron-Mobility Transistors After Gate Stress Bias

Lai

Zhong

Tsai

et al. 2021

Journal of Elec Materi

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“…The device switches on with a positive gate voltage ( V g > V th > 0) that forms a “real” normally‐off GaN HEMT. [ 30–35 ] While the p‐AlGaN gate is applied, a gate injection transistor (GIT) is fabricated to reduce the R on as the gate current increases. [ 36–38 ] In fact, the high acceptor concentrations of p‐GaN and p‐AlGaN are necessary to keep a diode‐like gate characteristic, which can be also achieved by introducing a NiO x ‐based interlayer below the gate.…”

Section: Gan‐based Hemt Power Device Structures—normally‐on and Normamentioning

confidence: 99%

Recent Advances in GaN‐Based Power HEMT Devices

Cheng

Wang

et al. 2021

Adv Elect Materials

115

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The ever‐increasing power density and operation frequency in electrical power conversion systems require the development of power devices that can outperform conventional Si‐based devices. Gallium nitride (GaN) has been regarded as the candidate for next‐generation power devices to improve the conversion efficiency in high‐power electric systems. GaN‐based high electron mobility transistors (HEMTs) with normally‐off operation is an important device structure for different application scenarios. In this review, an overview of a series of effective approaches to improve the performance of GaN‐based power HEMT devices is given. Modified epistructures are presented to suppress defects and current leakage, and low‐damage recess‐free processes are discussed in fabricating normally‐off HEMTs. Possible effects of dielectrics on a metal–insulator–semiconductor (MIS) structure are also intensively introduced. Metal/semiconductor contact engineering is investigated, and fabrication of Au‐free ohmic contact and graphene insertion layer to enhance the device performance is emphasized. Finally, the effects of field plates are studied through the use of simulated and fabricated devices.

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“…9(b), the incremental increase in V th makes it a good candidate for aging detections. The threshold voltage increase can potentially be caused by the traps under the gate and the AlGaN/GaN interface layer as the device is aged [27]. After the devices lose the blocking capability, a large drain leakage current is observed and the threshold voltage drops significantly.…”

Section: Threshold Voltage V Thmentioning

confidence: 99%

Performance Degradation of GaN HEMTs Under Accelerated Power Cycling Tests

Xu¹,

Yang²,

Uğur³

et al. 2018

CPSS TPEA

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In this paper, performance degradations of enhancement mode (E-mode) gallium nitride (GaN) high-electronmobility-transistors (HEMTs) under accelerated power cycling tests are presented. For this purpose, a DC power cycling setup is designed to accelerate the aging process in a realistic manner. In order to evaluate the aging-related parameter shifts and corresponding precursors, electrical parameters are periodically monitored through a high-end curve tracer. Both the cascode device and p-GaN gate GaN devices are evaluated during these tests. In the experimental results, it is observed that the onstate resistance gradually increases in both devices. Meanwhile, the threshold voltage of the p-GaN gate GaN device gradually increases over the aging cycles and a remarkable variation in the transfer characteristics is observed. At the end of the tests, failure analyses are conducted on both devices. The cascode GaN devices show both short and open circuit failure modes, and a weak point in the drain-side bond wires is detected. For the p-GaN gate GaN device, the electrical parameter shifts indicate a possible gate degradation after the device is aged. Index Terms-Aging precursor, failure analysis, failure mode, failure model, GaN device, power cycling. I. IntroductIon G ALLIUM nitride (GaN) devices are one of the most promising power devices in high frequency, high efficiency and high power density power conversions [1], [2]. Compared to Si and SiC counterparts, GaN high-electron-mobility transistors (HEMTs) exhibit a better figure of merit. The GaN HEMTs can be categorized into normally-on and normally-off devices [3]. Normally-on GaN device is less desirable in power converters due to its reliability concerns. For normally-off GaN devices, there are several methods to implement, including recessed Schottky gate, p-GaN gate, plasma treatment under the gate and cascode structure [4]. Among them, the cascode GaN and p-GaN gate GaN are mainly applied in commercially available GaN devices as shown in Fig. 1. Both these types of GaN devices show different characteristics from the conventional Si devices. For cascode GaN devices, there are two primary heat sources, i.e., the GaN HEMT

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Mechanism of Threshold Voltage Shift in ${p}$ -GaN Gate AlGaN/GaN Transistors

Cited by 110 publications

References 31 publications

Gate Capacitance and Off-State Characteristics of E-Mode p-GaN Gate AlGaN/GaN High-Electron-Mobility Transistors After Gate Stress Bias

Gate Capacitance and Off-State Characteristics of E-Mode p-GaN Gate AlGaN/GaN High-Electron-Mobility Transistors After Gate Stress Bias

Recent Advances in GaN‐Based Power HEMT Devices

Performance Degradation of GaN HEMTs Under Accelerated Power Cycling Tests

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