Measurement of temperature-dependent stress in copper-filled silicon vias using polarized Raman spectroscopy

Abstract

An experimental method to determine the temperature dependence of residual stress in threedimensional (3D) structures was developed using polarized Raman spectroscopy. Stresses of a copper-filled silicon via at three temperatures, 223, 298, and 413 K were derived by measuring the frequency shift of the optical phonons through the backscattering geometry from the cross-section of the structure and assuming non-isotropic biaxial (horizontal and depth) stresses on the crosssection. Both stress components changed from tensile to compressive in almost all areas as the temperature changed from 213 to 413 K. The absolute stress values increased at both low and high temperatures and were smallest at 298 K, which was nearest to the process temperature of copper filling by plating. The main cause of stress is considered to be the difference in the coefficient of thermal expansion between copper and silicon. These results indicate that the temperature dependence of stress of copper-filled vias is affected mainly by their fabrication temperature. Process temperature is one of the key factors for the reduction of thermal stress in 3D structures such as integrated circuits connected by through-silicon vias. V C 2013 AIP Publishing LLC.

Three-dimensional micro-Raman spectroscopy mapping of stress induced in Si by Cu-filled through-Si vias

“…1 The results also confirm that there is not only stress near the surface of the TSV as often assumed but also along the full length. 13,14 The measured positive Raman frequency shift increases when measuring closer to the TSV and can become very high, even up to 1.7 cm À1 (see Fig. 3, no.…”

“…Micro-Raman spectroscopy (lRS) is often used to study the stress imposed by TSVs in the surrounding Si. [13][14][15][16][17] The measurements are, in general, performed from the top surface: The Raman spectra of Si are measured during a line or 2D scan across the surface and the shift of the Raman peak frequency (Dx) from the stress value is plotted. This provides information on the stress near the Si surface, which is relevant for its impact on nearby transistors, but only gives limited information of the stress field near a TSV.…”

Relation between Raman frequency and triaxial stress in Si for surface and cross-sectional experiments in microelectronics components

“…In addition, any bending of this chip will change the local stress levels. 2 Because these stresses are located at micron scale dimensions, Raman spectroscopy is the ideal technique to study it.…”

“…Several recent publications indeed correlate micro-Raman spectroscopy (lRS) results measured in the Si near TSVs or micro-bumps with results from models and electrical measurements. [2][3][4][5][6][7][8][9][10][11][12][13] Nearly, all these studies, with a few exceptions, 9,11,13 however have one assumption in common: They neglect the stress component along the length axis of the TSV in their calculation of stress from the Raman frequency shift and assume uniaxial or biaxial stress in the Si surface plane. This assumption has to be applied with care: It is often incorrect and can lead to erroneous conclusions.…”

Thermal Analysis and Operational Characteristics of an AlGaN/GaN High Electron Mobility Transistor with Copper-Filled Structures: A Simulation Study

“…To propose an optimized thermal structure for the heat sink, we simulated the DC and thermal characteristics of AlGaN/GaN HEMTs by considering the application of copper-filled structures to a SiC substrate. Two different thermal structures, namely a copper-filled thermal trench (CTT) and a copper-filled thermal via (CTV), were used [15][16][17][18][19][20][21]. To verify the exact heat sink effect, we applied the thermal conductivity model and the corresponding parameters for each material.…”