MC-CChecker

Diep, Thanh-Dang; Fürlinger, Karl; Thoai, Nam

doi:10.1145/3236367.3236369

Cited by 9 publications

(1 citation statement)

References 23 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…By relying on multiplications and least common multiple operations, EVC values grow at an exponential rate, which can quickly require a very large number of bits in order to be able to represent it, and therefore store it. Despite this, the EVC has found a practical application to detect memory consistency errors in MPI one-sided applications [26], [27], due to the use of resets at global barrier synchronizations. The EVC was also used to detect weak conjunctive pred-icates in distributed systems [25].…”

Section: Related Workmentioning

confidence: 99%

Resettable Encoded Vector Clock for Causality Analysis With an Application to Dynamic Race Detection

Pozzetti

Kshemkalyani

2021

IEEE Trans. Parallel Distrib. Syst.

View full text Add to dashboard Cite

Causality tracking among events is a fundamental challenge in distributed environments. Much previous work on this subject has focused on designing an efficient and scalable protocol to represent logical time. Several implementations of logical clocks have been proposed, most recently the Encoded Vector Clock (EVC), a protocol to encode Vector Clocks (VC) in scalar numbers through the use of prime numbers, to improve performance and scalability. We propose and formalize the concept of Resettable Encoded Vector Clock (REVC), a new logical clock implementation, which builds on the EVC to tackle its very high growth rate issue. We show how our REVC can be applied in both shared memory systems and message passing systems to achieve a consistent logical clock. We show, through practical examples, the advantage of REVC's growth rate with respect to EVC's growth rate. Finally, we show a practical application of the REVC to the dynamic race detection problem in multi-threaded environments. We compare our tool to the currently existing VC-based tool DJIT + to show how the REVC can help in achieving higher performance with respect to the Vector Clock.

show abstract

Section: Related Workmentioning

confidence: 99%