A time-stamping system to detect memory consistency errors in MPI one-sided applications

Diep, Thanh-Dang; Pham, Kien; Fürlinger, Karl; Thoai, Nam

doi:10.1016/j.parco.2019.04.013

Cited by 4 publications

(5 citation statements)

References 19 publications

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“…MC-Checker [2] uses a post-mortem analysis based on a Directed Acyclic Graph (DAG) to detect concurrent regions (in respect to the happens-before relation [10]). MC-Checker has been enhanced with MC-CChecker [3]. This new tool reduces the number of false positives and improves the scalability of MC-Checker through a clock-based approach based on the encoded vector clock.…”

Section: Related Workmentioning

confidence: 99%

“…In step 2 ○, only memory locations that intersect with 𝑛𝑒𝑤𝐴𝑐𝑐 are represented as the rest of the algorithm will only consider these accesses. The following subsections explain the fragmentation and finish_insertion(𝑖𝑛𝑡𝑒𝑟𝐴𝑐𝑐, 𝑚𝑒𝑟𝑔𝑒𝑑𝐴𝑐𝑐, 𝐵𝑆𝑇 ) merging algorithms in details (steps 3 ○ and 4 ○). Finally, step 5 ○ updates the BST.…”

Section: New Data Race Detectionmentioning

confidence: 99%

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Rethinking Data Race Detection in MPI-RMA Programs

Vinayagame,

Saillard,

Thibault

et al. 2023

Proceedings of the SC '23 Workshops of the International Conference on High Performance Computing, Network, Storage, and Analys

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Supercomputers are capable of increasingly more computations, and nodes forming them need to communicate even more efficiently with each other. The Message Passing Interface (MPI) proposes a communication model based on one-sided communications called the MPI Remote Memory Access (MPI-RMA). Thanks to these operations, applications can improve the overlap of communications with computations. However, one-sided communications are complex to write since they are subject to data races. This paper rethinks an existing on-the-fly data race detection algorithm for MPI-RMA programs by improving the storage of memory accesses in a Binary Search Tree using a new insertion algorithm based on fragmentation and merging algorithms. Thus, experimental results on real-life applications show that this new insertion algorithm improves the accuracy of the data race detection and can reduce the overhead of the analysis at runtime by a factor up to two. CCS CONCEPTS• Computing methodologies → Parallel programming languages; • Software and its engineering → Software testing and debugging.

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Section: Related Workmentioning

confidence: 99%

Section: New Data Race Detectionmentioning

confidence: 99%

Rethinking Data Race Detection in MPI-RMA Programs

Vinayagame,

Saillard,

Thibault

et al. 2023

Proceedings of the SC '23 Workshops of the International Conference on High Performance Computing, Network, Storage, and Analys

View full text Add to dashboard Cite

show abstract

“…This work misses errors as it does not consider load and store accesses. MC-CChecker [5] and MC-Checker [4] both use a post-mortem analysis to detect data races. MC-Checker builds a DAG based on the happens-before relation to analyze the trace files.…”

Section: Related Workmentioning

confidence: 99%

“…[3]). Most of the literature study those errors through tracing and post-mortem analysis [4], [5] To the best of our knowledge, only our previous work [6] tackles the problem of memory consistency analysis at execution time. However, the dynamic analysis suffers from the scalability issue of such approaches.…”

Section: Introductionmentioning

confidence: 99%

Static Local Concurrency Errors Detection in MPI-RMA Programs

Saillard¹,

Sergent

Aitkaci³

et al. 2022

2022 IEEE/ACM Sixth International Workshop on Software Correctness for HPC Applications (Correctness)

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Communications are a critical part of HPC simulations, and one of the main focuses of application developers when scaling on supercomputers. While classical message passing (also called two-sided communications) is the dominant communication paradigm, one-sided communications are often praised to be efficient to overlap communications with computations, but challenging to program. Their usage is then generally abstracted through languages and memory abstractions to ease programming (e.g. PGAS). Therefore, little work has been done to help programmers use intermediate runtime layers, such as MPI-RMA, that is often reserved to expert programmers. Indeed, programming with MPI-RMA presents several challenges that require handling the asynchronous nature of one-sided communications to ensure the proper semantics of the program while ensuring its memory consistency. To help programmers detect memory errors such as race conditions as early as possible, this paper proposes a new static analysis of MPI-RMA codes that shows to the programmer the errors that can be detected at compile time. The detection is based on a novel local concurrency errors detection algorithm that tracks accesses through BFS searches on the Control Flow Graphs of a program. We show on several tests and an MPI-RMA variant of the GUPS benchmark that the static analysis allows to detect such errors on user codes. The error codes are integrated in the MPI Bugs Initiative opensource test suite.

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“…By relying on multiplications and least common multiple operations, EVC values grow at an exponential rate, which can quickly require a very large number of bits in order to be able to represent it, and therefore store it. Despite this, the EVC has found a practical application to detect memory consistency errors in MPI one-sided applications [26], [27], due to the use of resets at global barrier synchronizations. The EVC was also used to detect weak conjunctive pred-icates in distributed systems [25].…”

Section: Related Workmentioning

confidence: 99%

Resettable Encoded Vector Clock for Causality Analysis With an Application to Dynamic Race Detection

Pozzetti

Kshemkalyani

2021

IEEE Trans. Parallel Distrib. Syst.

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Causality tracking among events is a fundamental challenge in distributed environments. Much previous work on this subject has focused on designing an efficient and scalable protocol to represent logical time. Several implementations of logical clocks have been proposed, most recently the Encoded Vector Clock (EVC), a protocol to encode Vector Clocks (VC) in scalar numbers through the use of prime numbers, to improve performance and scalability. We propose and formalize the concept of Resettable Encoded Vector Clock (REVC), a new logical clock implementation, which builds on the EVC to tackle its very high growth rate issue. We show how our REVC can be applied in both shared memory systems and message passing systems to achieve a consistent logical clock. We show, through practical examples, the advantage of REVC's growth rate with respect to EVC's growth rate. Finally, we show a practical application of the REVC to the dynamic race detection problem in multi-threaded environments. We compare our tool to the currently existing VC-based tool DJIT + to show how the REVC can help in achieving higher performance with respect to the Vector Clock.

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A time-stamping system to detect memory consistency errors in MPI one-sided applications

Cited by 4 publications

References 19 publications

Rethinking Data Race Detection in MPI-RMA Programs

Rethinking Data Race Detection in MPI-RMA Programs

Static Local Concurrency Errors Detection in MPI-RMA Programs

Resettable Encoded Vector Clock for Causality Analysis With an Application to Dynamic Race Detection

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