Fundamentals of III-V Semiconductor MOSFETs 2010
DOI: 10.1007/978-1-4419-1547-4_8
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Materials and Technologies for III-V MOSFETs

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Cited by 34 publications
(47 citation statements)
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“…Yet, the reported admittance characteristics of wellbehaved dielectric/III-V interfaces with different dielectrics and/or dielectrics deposited by different methods are remarkably similar. 5,15,24 The similarity in the observed characteristics of MOSCAPs in the literature is in keeping with a large body of work on III-V Schottky barriers and surfaces that have shown that semiconductor surface Fermi level pinning is largely caused by defects in the III-V semiconductor and not by the specific surface adsorbate or metal. 3,4 While these results point to semiconductor defects as the origin, the mechanisms by which they could cause frequency dispersion in accumulation are not understood.…”
supporting
confidence: 73%
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“…Yet, the reported admittance characteristics of wellbehaved dielectric/III-V interfaces with different dielectrics and/or dielectrics deposited by different methods are remarkably similar. 5,15,24 The similarity in the observed characteristics of MOSCAPs in the literature is in keeping with a large body of work on III-V Schottky barriers and surfaces that have shown that semiconductor surface Fermi level pinning is largely caused by defects in the III-V semiconductor and not by the specific surface adsorbate or metal. 3,4 While these results point to semiconductor defects as the origin, the mechanisms by which they could cause frequency dispersion in accumulation are not understood.…”
supporting
confidence: 73%
“…Specifically, for dielectrics on In 0.53 Ga 0.47 As, the D it near midgap becomes very large. 5,6,15,24 At sufficient positive gate bias, the metal Fermi level will thus align with the high density of traps and electrons can tunnel from the traps to the metal. The ac signal causes the metal Fermi level (E Fm ) to oscillate through E t (trap level).…”
Section: -mentioning
confidence: 99%
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“…10,11 In particular, for Al 2 O 3 / III-V interfaces, forming gas anneals ͑which contain a few percent hydrogen͒ have resulted in significant improvements in the capacitance-voltage ͑CV͒ characteristics, with reduced interface trap response at negative gate biases for n-type channels and a lowering of the frequency dispersion in accumulation. 10,11 In this paper we show that forming gas anneals can reduce the midgap-D it of HfO 2 / In 0.53 Ga 0.47 As interfaces to a sufficiently low level that--in conjunction with a low equivalent oxide thicknesses ͑EOT͒--the Fermi level can be moved across midgap. Evidence for an unpinned Fermi level is provided by a large semiconductor band bending deep into the semiconductor band gap and by efficient movement of parallel conductance peaks.…”
Section: Introductionmentioning
confidence: 99%
“…integrated-circuit applications (e.g., [1][2][3][4][5]). The common target in the research and development of semiconductor materials for the devices, that save energy and own extended lifetime, is to improve the crystal quality.…”
mentioning
confidence: 99%