LTPS-TFT Pixel Circuit Compensating for TFT Threshold Voltage Shift and IR-Drop on the Power Line for AMOLED Displays

Abstract

We propose a new pixel design for the active matrix organic light-emitting diode (AMOLED) using low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs). The proposed pixel is composed of four switching TFTs, one driving TFT (DTFT), and one capacitor. The simulation results are performed by AIM-SPICE software. The error rate of OLED output current with V TH (threshold voltage) variation (0.3 V) and V dd power line drop by 1 V are improved to about 1.67% and 15%, respectively. Thus, the proposed pixel circuit can successfully overcome drawbacks suffered from DTFT threshold voltage deviation and IR-drop on power line.

Enhancement of picture quality on ultra-low brightness by optimizing the electrical potential required for OLED charging in the AMOLED displays

“…The stains can be classified into four types according to gray level and brightness mode. In this study, except other three types of stains beyond the mid gray and luminance which are caused by various reasons from such as OLED process [31][32][33], IR drop [34][35][36][37] or TFT process [25]. We focus on the stain ( 4 ) that can occur in 10 gray scale images with 500-nit brightness, and in 32 gray scale images with 2-nit brightness.…”

P‐1.4: Timing Model and Maximum‐Aperture Pixel Design of an Active‐Matrix Display

“…Active-matrix (AM) flat-panel displays (FPDs) based on different thin-film transistor (TFT) technologies, such as amorphous silicon (a-Si) [1], low-temperature polycrystalline silicon (LTPS) [2] and metal-oxide (MO) [3][4][5], often admit a large number of design parameters such as TFT structures, geometric parameters, driving modes and exhibit different performance. The realization of large-size and high-resolution AMFPDs demands tools assisting the design optimization of the individual pixels.…”

P‐9: Timing Model and Maximum‐Aperture Pixel Design of an Active‐Matrix Display

“…Active-matrix (AM) flat-panel displays (FPDs) based on different thin-film transistor (TFT) technologies, such as amorphous silicon (a-Si) [1], low-temperature polycrystalline silicon (LTPS) [2] and metal-oxide (MO) [3][4][5], often admit a large number of design parameters such as TFT structures, geometric parameters, driving modes and exhibit different performance. There is a demand for tools assisting the design optimization of large-size and high-resolution AMFPDs.…”