1996
DOI: 10.1117/12.235483
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<title>Producing design diagrams from declarative descriptions</title>

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Cited by 3 publications
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“…· Develop the most ecient implementation of the repeating units before hardware compilation, using device-speci®c descriptions like OAL if necessary. The system has been used in developing a number of regular array designs, including a systolic convolver [11], a systolic priority queue [9], a systolic sorter [10], a sine calculator [8], and in developing recon®gurable libraries for FPGAs [24,25]. It has also been used in producing implementations partly in hardware and partly in software [23].…”
Section: Resultsmentioning
confidence: 99%
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“…· Develop the most ecient implementation of the repeating units before hardware compilation, using device-speci®c descriptions like OAL if necessary. The system has been used in developing a number of regular array designs, including a systolic convolver [11], a systolic priority queue [9], a systolic sorter [10], a sine calculator [8], and in developing recon®gurable libraries for FPGAs [24,25]. It has also been used in producing implementations partly in hardware and partly in software [23].…”
Section: Resultsmentioning
confidence: 99%
“…Note that we adopt the convention that signals in the western and the northern sides are mapped onto the domain, and signals in the southern and the eastern sides are mapped onto the range [10]. Block diagram for beside and below are shown in Fig.…”
mentioning
confidence: 99%