<title>Miniaturized low-power parallel processor for space applications</title>

Abstract

A miniaturized, low-power parallel processor for space applications is under development by Space OJmputer OJrporation for DARPA's Advanced Space Technology Program. The basic goal of this project is the reduction, by an order of magnitude or more, of on-board processor weight, size and power consumption for space-based sensor systems. Our approach for achieving this goal is to use lowpower VLSI devices which maximize throughput per watt, together with threedimensional hybrid wafer-scale integration and packaging technology. In its prototype version, a l2-node processor will have a peak throughput greater than 1.2 GFLOPS and occupy a volume less than 15 cubic inches. . The basic goal of the SCC-lOO project is the reduction, by an order of magnitude or more, of on-board processor weight, size and power consumption for space-based sensor systems. Such processors must employ parallel architectures with multiple processing elements in order to achieve the high throughputs required (up to tens ofbilIions of operations per second). Our approach for achieving this goal is to use advanced VSLI implementations which maximize throughput per watt, together with three-dimensional hybrid wafer-scale integration (HWSI) packaging technology. Once the size o( the processor is reduced, it is possible to use shielding techniques not practical with larger-volume equipment, thereby reducing or even eliminating the need for high-cost, radiation-hardened components. Figure 1 shows a full-scale model of the prototype version of the SCC-lOO space processor with 12 processing nodes. This processor, which has a peak throughput in excess of 1.2 GFLOPS, occupies a volume of less than 15 cubic inches. If a 300 mil thick radiation shield (not shown) is used to enclose and protect the processor assembly, the volume occupied is 35 cubic inches. PROCESSOR REQUIREMENTSA basic requirement for the space processor is high throughput. Depending on the sensor type, sensor parameters and processing functions performed, this throughput can range from hundreds of millions to billions of arithmetic operations per second [2,3,4]. The only way in which such a wide range of performance objectives can be achieved is by use of a parallel processing architecture with multiple processing elements or "nodes".The second requirement is flexibility. This implies two important characteristics: programmability and modularity. It is essential that the processor be general-purpose rather than special-purpose in nature, with