Low threading dislocation density GaAs growth on on-axis GaP/Si (001)

Jung, Daehwan; Callahan, Patrick G.; Shin, B.; Mukherjee, Kunal; Gossard, A. C.; Bowers, John E.

doi:10.1063/1.5001360

Cited by 105 publications

(66 citation statements)

References 46 publications

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“…A 1.5 µm GaAs layer was then grown on both substrates in a solidsource molecular beam epitaxy (MBE), as previously reported [9,21]. A thermal annealing cycle was employed after the growth to facilitate dislocation annihilation [9,21]. Following this step, a 200 nm In 0.1 Ga 0.9 As/GaAs strained superlattice layer was grown.…”

Section: Sample Preparationmentioning

confidence: 99%

“…This residual stress is absent in sample s-GaP because of the matching thermal expansion coefficients of GaAs and GaP. The residual thermal stress was determined by measuring the red shift of the photoluminescence peak of the GaAs layers [9,10]. In addition to samples s-GaP and s-Si, a set of three GaAs films of 3 µm thickness were grown on GaAs, GaP and GaP/Si (see Fig.…”

Section: Sample Preparationmentioning

confidence: 99%

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Reduced thermal conductivity of epitaxial GaAs on Si due to symmetry-breaking biaxial strain

Vega-Flick

Jung

Yue

et al. 2019

Phys. Rev. Materials

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Epitaxial growth of III-V semiconductors on Si is a promising route for silicon photonics. Threading dislocations and the residual thermal stress generated during growth are expected to affect the thermal conductivity of the III-V semiconductors, which is crucial for efficient heat dissipation from photonic devices built on this platform. In this work, we combine a non-contact laser-induced transient thermal grating technique with ab initio phonon simulations to investigate the in-plane thermal transport of epitaxial GaAs-based buffer layers on Si, employed in the fabrication of III-V quantum dot lasers. Surprisingly, we find a significant reduction of the in-plane thermal conductivity of GaAs, up to 19%, as a result of a small in-plane biaxial stress of ∼250 MPa. Using ab initio phonon calculations, we attribute this effect to the enhancement of phonon-phonon scattering caused by the in-plane biaxial stress, which breaks the cubic crystal symmetry of GaAs. Our results indicate the importance of eliminating the residual thermal stress in the epitaxial III-V layers on Si to avoid the reduction of thermal conductivity and facilitate heat dissipation. Additionally, our results showcase potential means of effectively controlling thermal conductivity of solids with external strain/stress.

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Section: Sample Preparationmentioning

confidence: 99%

Section: Sample Preparationmentioning

confidence: 99%

Reduced thermal conductivity of epitaxial GaAs on Si due to symmetry-breaking biaxial strain

Vega-Flick

Jung

Yue

et al. 2019

Phys. Rev. Materials

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“…The first results on this template yielded TD densities of 2 × 10 8 cm 2 . Further refinement of the GaAs/GaP growth conditions by Jung et al 21 and the inclusion of thermal cycle annealing and dislocation filter layers pushed the TD density down to 7 × 10 6 cm 2 . A second, equally promising approach is the procedure developed by Li et al at HKUST which utilizes a CMOS compatible crystallographic etch to pattern v-shaped trenches in an on-axis Si substrate, aspect ratio trapping to limit defect propagation, and coalescence of an overgrown GaAs layer to provide bulk templates.…”

Section: Apl Photonics 3 030901 (2018)mentioning

confidence: 98%

“…Relative to Si, non-nitride III-V materials have larger lattice constants and higher coefficients of thermal expansion (see Table II) which, for unoptimized growth conditions, result in high densities (∼10 9 cm 2 ) of crystalline defects including primarily threading dislocations (TDs) and antiphase domains. Fortunately, through careful optimization of growth conditions and utilization of dislocation filtering layers and techniques, [19][20][21][22] the defect density can be reduced by a few orders of magnitude enabling near native substrate level performance.…”

Section: Introductionmentioning

confidence: 99%

Perspective: The future of quantum dot photonic integrated circuits

et al. 2018

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Direct epitaxial integration of III-V materials on Si offers substantial manufacturing cost and scalability advantages over heterogeneous integration. The challenge is that epitaxial growth introduces high densities of crystalline defects that limit device performance and lifetime. Quantum dot lasers, amplifiers, modulators, and photodetectors epitaxially grown on Si are showing promise for achieving low-cost, scalable integration with silicon photonics. The unique electrical confinement properties of quantum dots provide reduced sensitivity to the crystalline defects that result from III-V/Si growth, while their unique gain dynamics show promise for improved performance and new functionalities relative to their quantum well counterparts in many devices. Clear advantages for using quantum dot active layers for lasers and amplifiers on and off Si have already been demonstrated, and results for quantum dot based photodetectors and modulators look promising. Laser performance on Si is improving rapidly with continuous-wave threshold currents below 1 mA, injection efficiencies of 87%, and output powers of 175 mW at 20 °C. 1500-h reliability tests at 35 °C showed an extrapolated mean-time-to-failure of more than ten million hours. This represents a significant stride toward efficient, scalable, and reliable III-V lasers on on-axis Si substrates for photonic integrate circuits that are fully compatible with complementary metal-oxide-semiconductor (CMOS) foundries.

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“…The GaAs samples examined in this Rapid Communication were grown via molecular-beam epitaxy on on-axis (001) GaP/Si substrates (NAsP III/V GmbH) and GaP substrates (ITME) in a procedure described elsewhere [12]. The films were 3.1 µm thick, unintentionally doped p-type (<10 16 /cm 3 ), and are considered fully strain relaxed at growth temperature.…”

mentioning

confidence: 99%