Low‐temperature sputtered mixtures of high‐κ and high bandgap dielectrics for GIZO TFTs

Abstract

Abstract— This paper discusses the properties of sputtered multicomponent amorphous dielectrics based on mixtures of high‐κ and high‐bandgap materials and their integration in oxide TFTs, with processing temperatures not exceeding 150°C. Even if Ta2O5 films are already amorphous, multicomponent materials such as Ta2O5—SiO2 and Ta2O5—Al2O3 allow an increase in the bandgap and the smoothness of the films, reducing their leakage current and improving (in the case of Ta2O5—SiO2) the dielectric/semiconductor interface properties when these dielectrics are integrated in TFTs. For HfO2‐ based dielectrics, the advantages of multicomponent materials are even clearer: while HfO2 films present a polycrystalline structure and a rough surface, HfO2—SiO2 films exhibit an amorphous structure and a very smooth surface. The integration of the multicomponent dielectrics in GIZO TFTs allows remarkable performance, comparable with that of GIZO TFTs using SiO2 deposited at 400°C by PECVD. For instance, with Ta2O5—SiO2 as the dielectric layer, field‐effect mobility of 35 cm2/(V‐sec), close to 0 V turn‐on voltage, an on/off ratio higher than 106, a subthreshold slope of 0.24 V/dec, and a small/recoverable threshold voltage shifts under constant current (ID= 10 μA) stress during 24 hours are achieved. Initial results with multilayers of SiO2/HfO2—SiO2/SiO2 are also shown, allowing a lower leakage current with lower thickness and excellent device performance.

UV‐Assisted Low Temperature Oxide Dielectric Films for TFT Applications

“…The presence of this peak around 33° suggests that some short-range ordering exists in the films, but crystallization does not occur. [6] To examine the detailed compositions of oxide dielectrics, XPS spectra were obtained from both ZrO 2 and Al 2 O 3 , shown in Figure 3. Compared to the reference spectra from the literature, both samples reveal a high O1s peak, which may be due to hydroxyl OH radical formation during the UV annealing process, as indicated by Equation ( It is, of course, essential to have a smooth surface in order to achieve reliable device performance; a rough surface will induce a high density of electrical trapping sites or defects, resulting in inferior electronic behaviour.…”

“…Although our devices were not patterned, the on/off current ratio was about 4.0x10 6 , and the threshold voltage (V th ), subthreshold swing (SS), gate leakage current density (I G ) were 0.67 V, 0.08 V/decade and 10 -12 A/cm 2 . The extracted field-effect mobility in the saturation regime was 1.37 cm 2 /V.s, which is three times higher than the value exhibited by…”

“…[1][2][3] To date, the research effort has focused on improving the semiconductor materials [4,5] , devising dielectric material formulations with optimized structures [6,7] , and on using low-temperature processing [8][9][10][11] in order to achieve compatibility with plastic substrates. Among the various methods investigated, ultraviolet (UV) photochemical activation of sol-gel precursors is particularly significant, as the technique can also be adapted to form the gate insulator.…”

“…In this respect, it should be noted that the development of suitable gate materials has received significantly less attention than the active semiconductor layers. Desirable requirements for gate insulators include large permittivities, low leakage current densities, an optimized structure with smooth interfaces [6,7] and also the possibility of low temperature processing. [12] The availability of ultra-thin, highdielectric-constant (high-k) gate insulators will reduce significantly the operating voltage of solution processed oxide TFTs (currently a few tens of volts).…”

“…Such compounds possess high dielectric constants, large conduction band offsets and excellent solvent resistance. [14][15][16] These materials are generally vacuum deposited [6,7,15] or require relatively high post-annealing temperatures. [17][18][19][20] 3…”