Low Power Image Processing Applications on FPGAs Using Dynamic Voltage Scaling and Partial Reconfiguration

Podlubne, Ariel; Haase, Julian; Kalms, Lester; Akgun, Gokhan; Ali, Mohammad; Khar, Habib Ulhasan; Kamal, Ahmed; Göhringer, Diana

doi:10.1109/dasip.2018.8596910

Cited by 9 publications

(2 citation statements)

References 14 publications

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“…On the other hand, HiFlipVX, through the use of standard C++ language simplifies the graph's implementation, and it focused on portability including explicit data type management to generate optimized hardware. Moreover, HiFlipVX was validated out in numerous embedded applications for Xilinx [15][16][17]. This previous analysis recommends to extend HiFlipVX as an standard OpenVX based library to be compatible also with Intel FPGAs.…”

Section: Related Workmentioning

confidence: 99%

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A Cross-Platform OpenVX Library for FPGA Accelerators

Davila-Raigoza

Tejero

Villarroya-Gaudó

et al. 2021

2021 29th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)

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FPGAs are an excellent platform to implement computer vision applications, since these applications tend to offer a high level of parallelism with many data-independent operations. However, the freedom in the solution design space of FPGAs represents a problem because each solution must be individually designed, verified, and tuned. The emergence of High Level Synthesis (HLS) helps solving this problem and has allowed the implementation of open programming standards as OpenVX for computer vision applications on FPGAs, such as the HiFlipVX library developed exclusively for Xilinx devices. Although with the HiFlipVX library, designers can develop solutions efficiently on Xilinx, they do not have an approach to port and run their code on FPGAs from other manufacturers.This work extends the HiFlipVX capabilities in two significant ways: supporting Intel FPGA devices and enabling execution on discrete FPGA accelerators. To provide both without affecting user-facing code, the new carried out implementation combines two HLS programming models: C++, using Intel's system of tasks, and OpenCL, which provides the CPU interoperability. Comparing with pure OpenCL implementations, this work reduces kernel dispatch resources, saving up to 24% of ALUT resources for each kernel in a graph, and improves performance 2.6 × and energy consumption 1.6 × on average for a set of representative applications, compared with state-of-the-art frameworks.

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Section: Related Workmentioning

confidence: 99%

“…The functions of HiFlipVX were used for various applications, such as in a toolchain. [15], or an operating system [16]. Akgün et al show that the use of vectorization increases not only performance but energy efficiency as well [17].…”

Section: Hiflipvxmentioning

confidence: 99%