Resource Efficient Dynamic Voltage and Frequency Scaling on Xilinx FPGAs

Akgun, Gokhan; Kalms, Lester; Göhringer, Diana

doi:10.1007/978-3-030-44534-8_14

Cited by 10 publications

(12 citation statements)

References 15 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In addition to the OpenVX standard, most functions support different vectorization options (2x, 4x, 8x) and additional data types (8-, 16-or 32-bit signed/unsigned integers). The use of vectorization does not only increases performance, but also the energy efficiency, as shown by Akguen et al [2].…”

Section: The Hiflipvx Librarymentioning

confidence: 92%

A Parametrizable High-Level Synthesis Library for Accelerating Neural Networks on FPGAs

Kalms

Rad

Ali

et al. 2021

J Sign Process Syst

Self Cite

View full text Add to dashboard Cite

In recent years, Convolutional Neural Network CNN have been incorporated in a large number of applications, including multimedia retrieval and image classification. However, CNN based algorithms are computationally and resource intensive and therefore difficult to be used in embedded systems. FPGA based accelerators are becoming more and more popular in research and industry due to their flexibility and energy efficiency. However, the available resources and the size of the on-chip memory can limit the performance of the FPGA accelerator for CNN. This work proposes an High-Level Synthesis HLS library for CNN algorithms. It contains seven different streaming-capable CNN (plus two conversion) functions for creating large neural networks with deep pipelines. The different functions have many parameter settings (e.g. for resolution, feature maps, data types, kernel size, parallelilization, accuracy, etc.), which also enable compile-time optimizations. Our functions are integrated into the HiFlipVX library, which is an open source HLS FPGA library for image processing and object detection. This offers the possibility to implement different types of computer vision applications with one library. Due to the various configuration and parallelization possibilities of the library functions, it is possible to implement a high-performance, scalable and resource-efficient system, as our evaluation of the MobileNets algorithm shows.

show abstract

Section: The Hiflipvx Librarymentioning

confidence: 92%

A Parametrizable High-Level Synthesis Library for Accelerating Neural Networks on FPGAs

Kalms

Rad

Ali

et al. 2021

J Sign Process Syst

Self Cite

View full text Add to dashboard Cite

show abstract

“…On the other hand, HiFlipVX, through the use of standard C++ language simplifies the graph's implementation, and it focused on portability including explicit data type management to generate optimized hardware. Moreover, HiFlipVX was validated out in numerous embedded applications for Xilinx [15][16][17]. This previous analysis recommends to extend HiFlipVX as an standard OpenVX based library to be compatible also with Intel FPGAs.…”

Section: Related Workmentioning

confidence: 99%

“…[15], or an operating system [16]. Akgün et al show that the use of vectorization increases not only performance but energy efficiency as well [17].…”

Section: Hiflipvxmentioning

confidence: 99%

A Cross-Platform OpenVX Library for FPGA Accelerators

Davila-Raigoza

Tejero

Villarroya-Gaudó

et al. 2021

2021 29th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)

View full text Add to dashboard Cite

FPGAs are an excellent platform to implement computer vision applications, since these applications tend to offer a high level of parallelism with many data-independent operations. However, the freedom in the solution design space of FPGAs represents a problem because each solution must be individually designed, verified, and tuned. The emergence of High Level Synthesis (HLS) helps solving this problem and has allowed the implementation of open programming standards as OpenVX for computer vision applications on FPGAs, such as the HiFlipVX library developed exclusively for Xilinx devices. Although with the HiFlipVX library, designers can develop solutions efficiently on Xilinx, they do not have an approach to port and run their code on FPGAs from other manufacturers.This work extends the HiFlipVX capabilities in two significant ways: supporting Intel FPGA devices and enabling execution on discrete FPGA accelerators. To provide both without affecting user-facing code, the new carried out implementation combines two HLS programming models: C++, using Intel's system of tasks, and OpenCL, which provides the CPU interoperability. Comparing with pure OpenCL implementations, this work reduces kernel dispatch resources, saving up to 24% of ALUT resources for each kernel in a graph, and improves performance 2.6 × and energy consumption 1.6 × on average for a set of representative applications, compared with state-of-the-art frameworks.

show abstract

“…While many virtualization proposals exist for FPGAs [176], the hardware of cloud FPGAs is currently not abstracted away. Finally, despite the number of research works on voltage and frequency scaling on FPGAs [4], these techniques are not yet supported in heterogeneous settings.…”

Section: Manuscript Submitted To Acmmentioning

confidence: 99%

“…Power. Remote power-side channel attacks, 4 ○ in Figure 6, commonly employ sensors based on ring oscillators (ROs), easily created by connecting an odd number of inverters in a loop. The RO frequency of oscillation depends on the loop delay, which, in turn, depends on the power supply voltage.…”

Section: Dina G Mahmoud Vincent Lenders and Mirjana Stojilovićmentioning

confidence: 99%

Electrical-Level Attacks on CPUs, FPGAs, and GPUs: Survey and Implications in the Heterogeneous Era

Mahmoud

Lenders²,

Stojilović

2022

ACM Comput. Surv.

View full text Add to dashboard Cite

Given the need for efficient high-performance computing, computer architectures combining central processing units (CPUs), graphics processing units (GPUs), and field-programmable gate arrays (FPGAs) are currently prevalent. However, each of these components suffers from electrical-level security risks. Moving to heterogeneous systems, with the potential of multitenancy, it is essential to understand and investigate how the security vulnerabilities of individual components may affect the system as a whole. In this work, we provide a survey on the electrical-level attacks on CPUs, FPGAs, and GPUs. Additionally, we discuss whether these attacks can extend to heterogeneous systems and highlight open research directions for ensuring the security of heterogeneous computing systems in the future.

show abstract

Resource Efficient Dynamic Voltage and Frequency Scaling on Xilinx FPGAs

Cited by 10 publications

References 15 publications

A Parametrizable High-Level Synthesis Library for Accelerating Neural Networks on FPGAs

A Parametrizable High-Level Synthesis Library for Accelerating Neural Networks on FPGAs

A Cross-Platform OpenVX Library for FPGA Accelerators

Electrical-Level Attacks on CPUs, FPGAs, and GPUs: Survey and Implications in the Heterogeneous Era

Contact Info

Product

Resources

About