Low-power application-specific processor for FFT computations

Abstract

In this paper, we describe a processor architecture tailored for radix-4 and mixed-radix FFT algorithms, which have lower arithmetic complexity than radix-2 algorithms. The processor is based on transport triggered architecture and several optimizations have been used to improve the energy-efficiency. The processor has been synthesized on a 130nm standard cell technology and analysis show that a programmable solution can possess energy-efficiency comparable to a fixed-function ASIC.

On the FPGA-Based Implementation of a Flexible Waveform from a High-Level Description: Application to LTE FFT Case Study

“…Hundreds of architectures for 128-to 2048-point FFT has been proposed by varying the degree of parallelism and the radix factorization [19] [6]. These implementations are optimized in terms of speed, memory used and hardware logic requirements.…”

Low-power application-specific FFT processor for LTE applications

“…Still, after almost half a century, remains very high due to fundamental useful properties of DFT. The recent boost of such interest is due to communication applications, in particular Long Term Evolution (LTE) and Software Defined Radio (SDR), e.g., [2], [3], [4], [5], [6], [7], [8], [9], [10]. In these applications, very efficient implementations of DFT are needed in order to support extremely tight, mutually contradicting constraints such as hard real-time requirements on top of low-power, lowcost, and flexible hardware platforms.…”

“…There is a vast amount of different implementations of FFT, e.g., [2]- [10] to mention only few most recent publications related to communication applications. In particular, mixedradix4/2 [2]- [7], and mixed-radix4/2/3 [8] variable length FFT implementations were proposed.…”

Low-Power Application-Specific Processor for FFT Computations

“…Several optimizations have been used to improve the energy-efficiency of the processor. This paper is based on the principles reported in our earlier papers [18,19,21] and shows that a programmable solution can possess energy-efficiency comparable to fixed-function ASIC. The processor is tailored for radix-4 and mixed-radix FFT algorithms and supports several transform lengths.…”