Low Output-Conductance InAs-Channel Metal-Oxide-Semiconductor Field-Effect Transistors with SiO2 Gate Dielectrics

Abstract

This study reports the development of InAs-channel MOSFETs using PECVD-deposited SiO 2 gate dielectrics. Arsenic capping and desorption are applied to as-grown wafers to prevent the formation of native oxides before the gate dielectrics are then deposited. We believe that increased hole confinement in a layer structure effectively suppresses the impact ionization effect, and an output conductance as 18 mS/mm at a drain bias of 2 V is demonstrated. A 2 m-gate-length device exhibits dc performances of I DSS ¼ 154 mA/mm and g m ¼ 189 mS/mm, and rf performances of f T ¼ 14.5 GHz and f MAX ¼ 24 GHz. The InAs-channel MOS-FET has potential for application in high frequency circuit devices.In VLSI logic circuits, Si CMOS technology is expected to reach the scaling limit beyond 22-nm technology nodes. III-V compound materials are promising alternative channel materials to Si owing to their high-electron mobility. 1 However, a primary problem associated with the III-V MOSFETs is a lack of high-quality insulator-semiconductor interfaces. Related investigations have addressed the development of Ga 2 O 3 , Gd 2 O 3 , Al 2 O 3 , SiN x , HfO 2 and other gate dielectrics on III-V or Si channel materials. 2,3 Indium arsenide (InAs) has a high electron mobility of $30,000 cm 2 /V s and a saturation velocity of 8 Â 10 7 cm/s 4,5 and is an excellent channel material. In early studies, InAs metal-oxide-semiconductor (MOS) capacitors that were made by anodic oxide 6 and pyrolytically deposited SiO 2 7 yielded negative flat-band shifts and large hysteresis, indicating high densities of interface states and bulk fixed charges. Recently, W. Prost 8 and Q.-T. Do 9 demonstrated InAs nanowire MOSFETs using SiN x gate dielectrics that were deposited by PECVD. Enhanced dc but degraded rf performance were observed. This degradation is again primarily due to the charge trapping at dielectric/semiconductor interface. N. Li 10 developed MOS capacitors and FETs on bulk InAs materials using the Al 2 O 3 gate dielectrics of atomic layer deposition (ALD). The FETs exhibited incomplete pinch-off while low leakage was demonstrated in the MOS capacitors.Conventional InAs-channel heterojunction field-effect transistors (HFETs) suffer from high kink currents owing to a small InAs bandgap of 0.36 eV along with a type-II band lineup at the InAs-AlSb interfaces 11 Impact-ionized holes, which cannot be confined to the channel, either move to gate electrodes, increasing onstate leakage or accumulate in the buffer, inducing high kink currents (high output conductance). The high kink currents limit the feasible drain bias below 0.5 V and further applications in circuit design.To improve the incomplete pinch-off in the MOSFET and the poor hole confinement in the HFET, we propose a layer structure for developing the InAs-channel MOSFETs, which consists of high-resistivity Al(Ga)Sb layers in the buffer to avoid potential leakage paths through the conductive InAs buffer layer and a n-type doping sheet in the buffer to form a hole energy barrier. Epitaxial growth, de...