Low-Loss (&lt;formula formulatype="inline"&gt;&lt;tex Notation="TeX"&gt;$&amp;#x0003C;$&lt;/tex&gt; &lt;/formula&gt;1 dB) and Polarization-Insensitive Edge Fiber Couplers Fabricated on 200-mm Silicon-on-Insulator Wafers

Bakir, Badhise Ben; Gyves, A Vazquez de; Orobtchouk, Régis; Lyan, Philippe; Porzier, C; Roman, A.; Fédéli, Jean-Marc

doi:10.1109/lpt.2010.2044992

Cited by 137 publications

(53 citation statements)

References 12 publications

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“…Inverted tapers were added at the input and output ports to facilitate the coupling (as shown in Ref. [8]). The whole layout was covered with silica after the etching process.…”

Section: Fabricationmentioning

confidence: 99%

Ultrafast nonlinear dynamics in silicon nanocrystal-based horizontal slot waveguides

Matres

Martı́nez

Martí

et al. 2011

8th IEEE International Conference on Group IV Photonics

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“…Inverted tapers were added at the input and output ports to facilitate the coupling (as shown in Ref. [8]). The whole layout was covered with silica after the etching process.…”

Section: Fabricationmentioning

confidence: 99%

Ultrafast nonlinear dynamics in silicon nanocrystal-based horizontal slot waveguides

Matres

Martı́nez

Martí

et al. 2011

8th IEEE International Conference on Group IV Photonics

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“…Fiber to chip coupling can be accomplished both in-plane and out of plane ways. The former is typically done through edge coupling by means of an adiabatic spot size converter [6][7][8]. It essentially involves a lensed fiber placed at the end facet of a chip with an inverse tapered Si spot size waveguide embedded in an overlay medium that matches the fiber cross section (see Figure 1).…”

Section: Introductionmentioning

confidence: 99%

Grating-Assisted Fiber to Chip Coupling for SOI Photonic Circuits

2018

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Fiber to chip coupling is a critical aspect of any integrated photonic circuit. In terms of ease of fabrication as well as wafer-scale testability, surface grating couplers are by far the most preferred scheme of the coupling to integrated circuits. In the past decade, considerable effort has been made for designing efficient grating couplers on Silicon-on-Insulator (SOI) and other allied photonic platforms. Highly efficient grating couplers with sub-dB coupling performance have now been demonstrated. In this article, we review the recent advances made to develop grating coupler designs for a variety of applications on SOI platform. We begin with a basic overview of design methodology involving both shallow etched gratings and the emerging field of subwavelength gratings. The feasibility of reducing footprint by way of incorporating compact tapers is also explored. We also discuss novel grating designs like polarization diversity as well as dual band couplers. Lastly, a brief description of various packaging and wafer-scale testing schemes available for fiber-chip couplers is elaborated.

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“…Another disadvantage is the complicated fabrication steps required to produce a vertical taper. Some of these recent tapered SSC's include those providing <1 dB loss (Bakir et al 2010), suspended waveguides (Fang et al 2010) and dual tapered double core structures (Tokushima et al 2012).…”

Section: Introductionmentioning

confidence: 99%

Improved design for SOI based evanescently coupled multilayer spot-size converter

2017

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This is the accepted version of the paper.This version of the publication may differ from the final published version. Permanent repository link AbstractWe report an improved version of a spot size converter (SSC) consisting of a silicon nanowire evanescently coupled to a phase matched Poly Si multilayer structure. With wider transversal dimensions the multilayer structure expands the mode significantly thus increasing the coupling efficiency with the conventional single mode fiber. Detailed optimization process of a 17 layer based SSC is discussed and its coupling efficiency with a high NA fiber of radius 2 μm is obtained as 98% providing only 0.087 dB loss. Vertical alignment tolerance between the optimized SSC and a high NA fiber of radius 2 μm is also shown. This novel design does not consist of a taper and can be fabricated by using CMOS compatible process. It has a short device length and more relaxed alignment tolerances with the fiber. Full vectorial and computationally efficient finite element method and the least squares boundary residual method have been used for the analysis and optimization of the proposed structure.

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Low-Loss (<formula formulatype="inline"><tex Notation="TeX">$<$</tex> </formula>1 dB) and Polarization-Insensitive Edge Fiber Couplers Fabricated on 200-mm Silicon-on-Insulator Wafers

Cited by 137 publications

References 12 publications

Ultrafast nonlinear dynamics in silicon nanocrystal-based horizontal slot waveguides

Ultrafast nonlinear dynamics in silicon nanocrystal-based horizontal slot waveguides

Grating-Assisted Fiber to Chip Coupling for SOI Photonic Circuits

Improved design for SOI based evanescently coupled multilayer spot-size converter

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