Low-Leakage and Compact Registers with Easy-Sleep Mode

Abstract

Multi-threshold voltage CMOS (MTCMOS) is an effective technique for suppressing the leakage currents in idle circuits. When the conventional MTCMOS technique is directly applied to a sequential circuit however the stored data is lost during the low-leakage sleep mode. Significant energy and timing penalties are suffered to restore the pre-sleep system state at the end of the sleep mode with the conventional MTCMOS circuits. Two new master-slave MTCMOS memory flip-flops are presented in this paper for providing a low-complexity and low-leakage data retention sleep mode. A small size high threshold voltage static memory cell is integrated into an MTCMOS flip-flop to preserve the stored data while drastically reducing the leakage power consumption of idle sequential circuits. The already existing sleep signal of the MTCMOS circuitry is also used for controlling the data retention and restoration operations, thereby eliminating the need for any extra control signals. The memory flip-flops provide a significantly simplified sleep control/data transfer mechanism and reduce the circuit area by up to 37.21% as compared to the previously published MTCMOS flip-flops. Furthermore, the leakage power consumption with the presented techniques is reduced by up to 97.71% as compared to the previously published techniques in a UMC 80 nm CMOS technology.

Path Specific Register Design to Reduce Standby Power Consumption

“…In conventional MTCMOS, however, the idle circuit is disconnected from the power supply voltage and the state of the circuit is lost. Several different versions of MTCMOS have been developed specifically for register design to alleviate this issue [8,14,[21][22][23]. These techniques, however, require additional inverters and transmission gates, decreasing the amount of power that can be reduced while also increasing the overall area.…”

“…More than 40% of the total energy in the active mode can be dissipated due to idle transistors in modern systems-on-chip [7][8][9]. Furthermore, leakage current is the dominant source of energy consumption when the IC is in the idle mode, significantly degrading the battery life in portable devices.…”

A Low Leakage Autonomous Data Retention Flip-Flop with Power Gating Technique

“…It is reported that more than 40% of total power can be due to the leakage currents [1][2][3][4][5][6]. In an idle circuit, leakage is the main source of power consumption.…”

“…In an idle circuit, leakage is the main source of power consumption. Therefore, for the battery-dependent portable devices, reducing the leakage is critical for a longer battery lifetime of those devices [3][4][5][6][7][8].…”

“…In active mode, the sleep transistors connect the supply/ground rails and functional block to ensure the circuit working properly. During sleep mode, the idle leakage currents are suppressed by cutting off the connection [2,6,9,12].…”