A multi‐scale methodology connecting device physics to compact models and circuit applications for OxRAM technology

Abstract

RRAM technology relying on transitional metal oxides (namely OxRAM) is about to reach the industrial stage. Nevertheless the physical-based understanding of the material and process implications at device and circuit levels is still not completely clear, hindering the full industrial exploitation of the OxRAM technology. In this context, this article presents a multi-scale methodology that connects the microscopic material properties to the electrical behavior of OxRAM devices at the circuit level. Microscopic models describing OxRAM operation (i.e., forming, resistive switching) and variability (e.g., cycle-to-cycle, RTN) will be reviewed and used for the development of compact models that will allow investigating the potential of this technology at the circuit level. An overview of some innovative applications involving OxRAM will be finally presented

Exploiting OxRAM Resistive Switching for Dynamic Range Improvement of CMOS Image Sensors

“…Formation of a conductive filament (CF), comprising of oxygen vacancies and defects in the active layer, switches the device to a low resistance state (LRS / R SET ), while rupturing of the CF switches the device to a high-resistance state (HRS / R RESET ) [16]. Resistive behavior of OxRAM devices has been well characterized [16], and modeled [17], [18], [19] for HfOx and several other metal oxide stacks.…”

Non‐volatile memories: Materials, nanostructures and integration approaches

“…Contribution areas included semiconductor‐based memories, flash magnetic memories, ferroelectric systems, chalcogenide‐ based phase change memory, resistive RAM featuring novel dielectrics and neuromorphic concepts, conductive bridge RAM based on innovative nanostructured configurations and oxide stacks. These subject areas were presented as oral and poster contributions and are nicely represented by the papers of this special issue, which includes four featured articles discussing the recent progress in peripheral CMOS devices for DRAM , the reliability of electrochemical metallization memories and conductive bridge RAM as linked with their selected device structures , a modelling investigation to understand the role of the material properties of oxide‐based resistive RAM devices on the electrical behaviour at circuit level , and a new concept to extend the life of planar NAND beyond the 20 nm node, namely hybrid floating gate .…”