Low-Energy FPGAs — Architecture and Design

Power-aware technology mapping for LUT-based FPGAs

“…Several studies of FPGA power consumption have appeared recently in the literature [6,2]. These works have shown that power dissipation in FPGA devices is predominantly in the programmable interconnection network.…”

“…Despite continuing technology scaling and decreasing supply voltage values, the power consumed by the largest FPGA devices is increasing, with the power of the largest chips now being measured in watts [2]. Reducing the power consumption of FPGAs is beneficial as it leads to lower packaging and cooling costs as well as improves reliability.…”

A Novel Low Leakage Power FPGAs Look-Up Table

“…Field Programmable Gate Arrays (FPGAs) have become one of the most popular implementation media for digital circuits as FPGAs have some advantages: high speed, fast time-to-market and steadily decreasing cost. However, FPGAs are power inefficient compared to logically equivalent Application-Specific Integrated Circuits (ASICs) [1]. Most of the early work on low-power FPGAs has focus on dynamic power consumption, however, leakage power can now compose over 50% of total FPGAs power [2].…”

A novel low-power FPGA routing switch

“…A number of recent studies have considered optimizing FPGA power consumption at the architecture or circuit level [2,12,5,13]. To our knowledge, the only work to specifically address leakage in FPGA interconnect is [6], which applies wellknown leakage reduction techniques to interconnect multiplexers.…”

“…Field-programmable gate arrays (FPGAs) are a popular choice for digital circuit implementation; however, they are less power-efficient than custom ASICs as a result of the overhead required to provide programmability [2]. Lowpower is therefore likely to be a key objective in the design of future FPGAs.…”