Low-Complexity, Low-Memory EMS Algorithm for Non-Binary LDPC Codes

Voicila, Adrian; Declereq, D.; Verdier, François; Fossorier, M.P.C.; Urard, Pascal

doi:10.1109/icc.2007.115

Cited by 62 publications

(56 citation statements)

References 9 publications

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“…In [12], QSPA algorithms are used for three serial non-binary LDPC decoders. In [13], EMS decoder was designed for non -binary LDPC codes utilizing Minimum -sum algorithm. This decoder was mainly designed to address the memory problem as well as to minimize the decoding iteration.…”

Section: Related Workmentioning

confidence: 99%

Efficient high throughput decoding architecture for non-binary LDPC codes

Murugan¹,

Banuselvasaraswathy²,

Gayathree³

et al. 2018

IJET

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This article, deals with efficient trellis inbuilt decoding architecture for non-binary Linear Density Parity Check (LDPC) codes. In this decoder, a bidirectional recursion is embedded to enhance the layered scheduling and decoding latency, which in turn is used to minimize the number of iterations compared to existing techniques. Consequently, it is necessary to increase the throughput for improving the efficiency of the system. In addition, a compression technique is implemented for reducing the requirements of memory and the area. Trellis based decoder was used to reinforce the check node processing. The proposed decoder for LDPC codes yields high throughput when compared to other similar decoders presented in preceding works. The designed architecture was implemented using Cadence Virtuoso software. This decoder provides a throughput of about 39.21 Mb/s at clock frequency of 190MHz.

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Section: Related Workmentioning

confidence: 99%

Efficient high throughput decoding architecture for non-binary LDPC codes

Murugan¹,

Banuselvasaraswathy²,

Gayathree³

et al. 2018

IJET

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“…The complexity of FFT-QSPA is on the order of O(p2 p ), whereas the straightforward implementation of the BP algorithm [3] has complexity on the order of O (2 2p ). Recently, reference [9] presented a low-complexity, low-memory decoding algorithm for LDPC codes over GF (2 p ), which has complexity on the order of O(n m log n m ) where n m 2 p . The complexity of the decoder in [9] is comparable to that of a binary decoder.…”

Section: Introductionmentioning

confidence: 99%

“…Recently, reference [9] presented a low-complexity, low-memory decoding algorithm for LDPC codes over GF (2 p ), which has complexity on the order of O(n m log n m ) where n m 2 p . The complexity of the decoder in [9] is comparable to that of a binary decoder. An universal linear-complexity encoding algorithm for any cycle GF(2 p ) code is available in [10].…”

Section: Introductionmentioning

confidence: 99%

Group-theoretic analysis of cayley-graph-based cycle gf(2^p) codes

Huang

Zhou

Zhu

et al. 2009

IEEE Trans. Commun.

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Abstract-Using group theory, we analyze cycle GF(2 p ) codes that use Cayley graphs as their associated graphs. First, we show that through row and column permutations the parity check matrix H can be put in a concatenation form of row-permuted block-diagonal matrices. Encoding utilizing this form can be performed in linear time and in parallel. Second, we derive a rule to determine the nonzero entries of H and present determinate and semi-determinate codes. Our simulations show that the determinate and semi-determinate codes have better performance than codes with randomly generated nonzero entries for GF(16) and GF(64), and have similar performance for GF(256). The constructed determinate and semi-determinate codes over GF(64) and GF(256) can outperform the binary irregular counterparts of the same block lengths. One distinct advantage for determinate and semi-determinate codes is that they greatly reduce the storage cost of H for decoding. The results in this correspondence are appealing for the implementation of efficient encoders and decoders for this class of promising LDPC codes, especially when the block length is large.

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“…In [24] the authors evaluate implementation costs for various values of q by the extension of the layered decoder to the NB case. An architecture for a parallel or serial implementation of the EMS decoder is proposed in [16]. Also, the implementation of the Min-Max decoder is considered in [25], [26] and optimized in [27] for GF (32).…”

Section: Introductionmentioning

confidence: 99%

“…This algorithm is also described in the logarithm domain [14], leading to the so-called log-BP-FFT. In [15] [16], the authors introduce the Extended Min-Sum (EMS), which is based on a generalization of the Min-Sum algorithm used for binary LDPC codes ( [17], [18] and [19]). Its principle is the truncation of the vector messages from q to n m values (n m << q), introducing a performance degradation compared to the BP algorithm.…”

Section: Introductionmentioning

confidence: 99%

Design of a GF(64)-LDPC Decoder Based on the EMS Algorithm

Boutillon

Conde-Canencia

Ghouwayel

2013

IEEE Trans. Circuits Syst. I

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Abstract-This paper presents the architecture, performance and implementation results of a serial GF(64)-LDPC decoder based on a reduced-complexity version of the Extended MinSum algorithm. The main contributions of this work correspond to the variable node processing, the codeword decision and the elementary check node processing. Post-synthesis area results show that the decoder area is less than 20% of a Virtex 4 FPGA for a decoding throughput of 2.95 Mbps. The implemented decoder presents performance at less than 0.7 dB from the Belief Propagation algorithm for different code lengths and rates. Moreover, the proposed architecture can be easily adapted to decode very high Galois Field orders, such as GF(4096) or higher, by slightly modifying a marginal part of the design.

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Low-Complexity, Low-Memory EMS Algorithm for Non-Binary LDPC Codes

Cited by 62 publications

References 9 publications

Efficient high throughput decoding architecture for non-binary LDPC codes

Efficient high throughput decoding architecture for non-binary LDPC codes

Group-theoretic analysis of cayley-graph-based cycle gf(2^p) codes

Design of a GF(64)-LDPC Decoder Based on the EMS Algorithm

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Low-Complexity, Low-Memory EMS Algorithm for Non-Binary LDPC Codes

Cited by 62 publications

References 9 publications

Efficient high throughput decoding architecture for non-binary LDPC codes

Efficient high throughput decoding architecture for non-binary LDPC codes

Group-theoretic analysis of cayley-graph-based cycle gf(2p) codes

Design of a GF(64)-LDPC Decoder Based on the EMS Algorithm

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Group-theoretic analysis of cayley-graph-based cycle gf(2^p) codes