Low area overhead DPA countermeasure exploiting tunnel transistor‐based random number generator

Abstract

Differential power analysis (DPA) has become an efficient side channel attack that obtains a secret key from the extracted power traces. Several traditional CMOS-based DPA countermeasures resulted in high area overhead and performance degradation. This study presents low area overhead DPA countermeasure exploring tunnel field effect transistors (TFET) based random number generator (RNG). TFET exhibits significant p-in forward current with an increase in negative drain-to-source voltage bias. It is demonstrated that TFET transmission gate exhibits unconventional behaviour due to p-in forward current of the device. Leveraging this behaviour TFET RNG is designed that extracts random bits from delay variations of the TFET ring oscillator. The proposed TFET RNG achieves low area overhead when compared with the baseline CMOS designs. The proposed DPA countermeasure is demonstrated by integrating the original TFET substitution box (S-box) and TFET RNG. The proposed architecture is found to be resilient to DPA attack and the area overhead of single S-box and Advanced Encryption Standard AES is as low as 12 and 5%, respectively. Apart from low area overhead, the TFET designs with inherent device characteristics show high robustness against reverse engineering attacks which provide a higher level of security to TFET-based circuits and systems.

Tunnel FET‐based ultra‐lightweight reconfigurable TRNG and PUF design for resource‐constrained internet of things

“…The characteristics and detailed analysis of RO have been presented in the prior works. 34,35 Apart from this, a 10-bit counter is explored to record the oscillations of TFET RO. To update the output of reconfigurable TRNG and PUF design in every clock (CLK) cycle, a 10-bit register is also used.…”

“…32,33 Orthogonal to this, the p-i-n forward current of TFET is explored as favorable feature to enhance the hardware security of circuits/systems. [34][35][36] In the recent works, authors have proposed TFET p-i-n forward based TRNG design that shows higher resilience towards reverse engineering attacks. 34 Leveraging the p-i-n forward current, TFET-based differential power analysis resistant crypto circuits have been demonstrated that achieve lower area overhead.…”

“…34 Leveraging the p-i-n forward current, TFET-based differential power analysis resistant crypto circuits have been demonstrated that achieve lower area overhead. 35 In addition, TFET p-i-n forward current is utilized to modify the flip-flop functionality for device-level hardware obfuscation application. However, none of the works have proposed reconfigurable TRNG and PUF design and its analysis.…”